A 16nm Fully Integrated SoC for Hardware-Aware Neural Architecture Search
Journal
European Solid-State Circuits Conference
Start Page
397
End Page
400
ISBN
[9798331525392]
Date Issued
2025-09-08
Author(s)
Lin, Yu-Cheng
Huang, Ming-Shan
Wang, Jeng-Bang
Chen, Wen-Ching
Chang, Nian-Shyang
Lin, Chun-Pin
Chen, Chi-Shi
Abstract
Neural architecture search (NAS) is a technique that can automatically design and optimize neural network architectures. It aims to find a better balance between AI performance and hardware efficiency, at the cost of excessively high computational complexity. This work presents the first fully integrated system-on-chip (SoC) specialized for accelerating hardware-aware NAS. The SoC enables efficient exploration on diverse network architectures in the accuracy-latency space. It supports commonly-used networks, including convolutional neural network (CNN), recurrent neural network (RNN), and Transformer. Fabricated in 16 nm FinFET, the chip dissipates 255 mW at a clock frequency of 500 MHz from a 0.8 V supply. Compared to an NVIDIA A40 GPU, this work achieves a 27× speedup at a 2.6× lower clock frequency, given 1176× less power and 166× smaller silicon area.
Event(s)
51st IEEE European Solid-State Electronics Research Conference, ESSERC 2025
Publisher
IEEE Computer Society
Type
conference paper