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  4. Effects of post-deposition annealing ambient on the electrical and chemical properties of ZnO/4H-SiC heterojunction diodes
 
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Effects of post-deposition annealing ambient on the electrical and chemical properties of ZnO/4H-SiC heterojunction diodes

Journal
Materials Science in Semiconductor Processing
Journal Volume
213
Start Page
110839
ISSN
13698001
Date Issued
2026-10
Author(s)
Park, Chang-Jun
Prasad, Chowdam Venkata
Kim, Minseok
Choi, Jin-Woo
Kim, Ye-Jin
Lee, Geon-Hee
KUNG-YEN LEE  
Koo, Sang-Mo
DOI
10.1016/j.mssp.2026.110839
URI
https://www.scopus.com/record/display.uri?eid=2-s2.0-105040198303&origin=resultslist
https://scholars.lib.ntu.edu.tw/handle/123456789/738930
Abstract
ZnO/4H-SiC heterojunction diodes (HJDs) were fabricated using RF-sputtered ZnO films on 4H-SiC epitaxial substrates, followed by post deposition annealing in N2 and O2 ambients. The influence of annealing atmosphere on structural, chemical, electrical, and defect properties was systematically investigated using XRD, AFM, UV-visible spectroscopy, XPS, J-V, C-V, and DLTS. Annealing improved ZnO crystallinity while preserving strong (002) orientation. XPS analysis revealed that O2 annealing significantly reduced oxygen-deficiency-related components, indicating improved stoichiometry. Electrical measurements showed that N2 annealing enhances forward conduction, yielding a lower turn-on voltage (Von) (0.6 V), reduced on-resistance (Ron,sp) (0.51 Ω cm2), and a high rectification ratio (RR) (∼4.98 × 107), whereas O2 annealing increased the barrier height (BH) (0.87 eV), resulting in a higher Von (3.1 V), a much larger Ron,sp (4.79 × 103 Ω cm2), and a lower rectification ratio (∼4.19 × 103). C-V analysis indicated annealing-dependent changes in apparent junction electrostatics, rather than direct modification of the bulk doping concentration. Interface-state analysis showed that the N2-annealed devices exhibited the lowest extracted interface-state density (Nss) response under the present analysis conditions, suggesting a reduced apparent interfacial contribution rather than an absolute reduction in interface-trap density. DLTS measurements identified three dominant trap levels, among which the level at ∼0.62-0.65 eV was attributed to the Z1/2 center in 4H-SiC, confirmed using a reference epilayer, while the remaining ZnO/interface-related trap signatures were modified by the annealing atmosphere. Taken together, the results indicate that the annealing ambient influences defect-related electrical responses and suggests a trade-off between forward conduction and barrier-controlled rectification under the present extraction conditions.
Subjects
4H-SiC
DLTS
Heterojunction
Interface state density
XPS
ZnO
Publisher
Elsevier Ltd
Type
journal article

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