A 0.8-V 80.7-GHz Dual-Core-Coupled Triple-Mode VCO in 40-nm CMOS
Journal
2025 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2025 - Proceedings
Start Page
178
End Page
180
ISBN (of the container)
979-833150353-6
Date Issued
2026-02-03
Author(s)
Abstract
This paper presents an 80.7-GHz voltage-controlled oscillator (VCO) based on a dual-core architecture. In the proposed VCO, both cores are loaded with a capacitor-loaded transformer, in which the transformers are coupled through switches. The effective inductance of the tank can be adjusted by configuring the coupling switches, enabling a triple-mode operation for wide frequency tuning range (FTR) without sacrificing phase noise (PN). To further enhance the VCO performance under sub-1V and W-band operation, the Class-D topology is also exploited in this design. The presented VCO is fabricated in a 40-nm CMOS process; the active area is 0.057 mm2. This VCO consumes 26.48 mW under a 0.8-V supply and achieves an 18.2% FTR. PN at 10-MHz offset is -111.68-dBc/Hz with a FoM of -175.6-dBc/Hz and FoMT of -180.6 dBc/Hz.
Event(s)
2025 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2025
Subjects
Dual-Core architecture
Frequency tuning range
mm-Wave
Phase noise
Transformer-Loaded
Voltage-controlled oscillator (VCO)
Publisher
IEEE
Type
conference paper