Low-Temperature Chip Scale Cu-Cu Hybrid Bonding by Electroless Ag Passivation
Part Of
Proceedings - Electronic Components and Technology Conference
Start Page
104
End Page
108
ISSN
05695503
ISBN (of the container)
9798331564179
ISBN
9798331564179
Date Issued
2026
Author(s)
Yang, Cheng-Yan
Hsieh, Ming-Hsuan
Shih, Po-Shao
Lee, Wei Choong
Lu, Yu-Hsiang
Hung, Yun-Ching
Lin, Yung-Sheng
Wang, Chen-Chao
Hung, Chih-Pin
Abstract
Cu-Cu hybrid bonding has demonstrated as a promising solution for three-dimensional integrated circuit construction. However, conventional Cu-Cu hybrid bonding processes face challenges such as the need for a high-vacuum environment, stringent surface condition requirements, and bonding temperatures exceeding 300 ℃, which can induce chip warpage and device degradation. To address these issues, this study proposes a low-temperature, ambient die-level Cu-Cu hybrid bonding process. An Ag passivation layer was deposited on the Cu pads of a 30-micrometer-pitch test vehicle via an electroless plating process. Energy-dispersive X-ray spectroscopy analysis confirmed that Ag signals were detected only on the Cu pad regions and not on the dielectric regions, indicating excellent deposition selectivity. Atomic force microscopy revealed high surface roughness of the as-deposited Ag layer, successful bonding was achieved under ambient conditions by leveraging the soft mechanical properties and spontaneous oxide decomposition characteristics of Ag. Scanning electron microscopy and transmission electron microscopy observations further confirmed intimate contact between the Ag passivation layer and the Cu pads, resulting in a high-quality bonding interface. The electrical test yield of Cu-Cu hybrid bonding with an Ag passivation layer showed significant improvement compared with the conventional Cu-Cu bonding baseline processed at temperature below 250 °C. Overall, this study demonstrates that electroless Ag passivation enables Cu-Cu hybrid bonding under low-temperature, ambient environments with less stringent surface requirements, offering strong potential for future three-dimensional integrated circuit packaging applications.
Event(s)
76th IEEE Electronic Components and Technology Conference, ECTC 2026, 26 May 2026 - 29 May 2026, Orlando
Subjects
3DIC
electroless plating
hybrid bonding
low temperature bonding
silver passivation
Publisher
Institute of Electrical and Electronics Engineers Inc.
Type
conference paper