Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
2018 | A 1-V 2.6-mW Environmental Compensated Fully Integrated Nose-on-a-Chip | T.-I Chou; K.-H. Chang; J.-Y. Jhang; S.-W. Chiu; G. Wang; CHIA-HSIANG YANG ; H. Chiueh; H. Chen; C.-C. Hsieh; M.-F. Chang; K.-T. Tang | IEEE Transactions on Circuits and Systems II | 5 | 4 | |
2021 | A 1.18mW Double Ratchet Cryptographic Processor with Backward Secrecy for IoT Devices | Yu S.-J; Lee Y.-C; CHIA-HSIANG YANG | Proceedings - A-SSCC 2021: IEEE Asian Solid-State Circuits Conference | | | |
2022 | A 1.3mW Speech-to-Text Accelerator with Bidirectional Light Gated Recurrent Units for Edge AI | Tsai, Yu Hsuan; YI-CHENG LIN; Chen, Wen Ching; Lin, Liang Yi; Chang, Nian Shyang; CHUN-PIN LIN; Chen, Shi Hao; Chen, Chi Shi; CHIA-HSIANG YANG | 2022 IEEE Asian Solid-State Circuits Conference, A-SSCC 2022 - Proceedings | 0 | 0 | |
2020 | A 1.5 mW Programmable Acoustic Signal Processor for Hearing Assistive Devices with Speech Intelligibility Enhancement | Lin Y.-J; Lee Y.-C; Liu H.-M; Chiueh H; Chi T.-S; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Papers | | | |
2021 | A 1.5-μJ/Task Path-Planning Processor for 2-D/3-D Autonomous Navigation of Microrobots | Chung C; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | | | |
2020 | A 1.5£gJ/Task Path-Planning Processor for 2D/3D Autonomous Navigation of Micro Robots | Chung, C.; CHIA-HSIANG YANG | Digest of Technical Papers - IEEE International Solid-State Circuits Conference | | | |
2018 | A 1.9-mW SVM Processor with On-chip Active Learning for Epileptic Seizure Control | Huang S.-A.; Chang K.-C.; HORNG-HUEI LIOU ; Yang C.-H.; CHIA-HSIANG YANG | Int. Symposium on VLSI Circuits (VLSI Circuits) | 9 | 0 | |
2020 | A 1.9-mW SVM Processor with On-Chip Active Learning for Epileptic Seizure Control | Huang, S.-A.; Chang, K.-C.; HORNG-HUEI LIOU ; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 32 | 23 | |
2020 | A 1.96 Gb/s Massive MU-MIMO Detector for Next-Generation Cellular Systems | Wen, C.-C.; Lee, Y.-C.; Wu, Y.-C.; Kao, C.-C.; CHIA-HSIANG YANG | IEEE Symposium on VLSI Circuits, Digest of Technical Papers | | | |
2019 | A 12.6 mW, 573-2901 kS/s Reconfigurable Processor for Reconstruction of Compressively Sensed Physiological Signals | Wang, Y.-Z.; Wang, Y.-P.; Wu, Y.-C.; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | | | |
2018 | A 12.6MW 573-2,901KS/S Reconfigurable Processor for Reconstruction of Compressively-Sensed Phvsiological Signals | Wang Y.-Z; Wang Y.-P; Wu Y.-C; CHIA-HSIANG YANG | IEEE Symposium on VLSI Circuits, Digest of Technical Papers | | | |
2018 | A 12.6mW 573-2,901KS/s Reconfigurable Processor for Reconstruction of Compressively-Sensed Physiological Signals | Y.-Z. Wang; Y.-P. Wang; Y.-C. Wu; C.-H. Yang; CHIA-HSIANG YANG | Int. Symposium on VLSI Circuits (VLSI Circuits) | 3 | 0 | |
2017 | A 135-mW Fully Integrated Data Processor for Next-Generation Sequencing | Wu, Y.-C.; Chang, C.-H.; Hung, J.-H.; CHIA-HSIANG YANG | IEEE Transactions on Biomedical Circuits and Systems | | | |
2017 | A 135mW Fully Integrated Data Processor for Next-Generation Sequencing | Y.-C. Wu; J.-H. Hung; C.-H. Yang; CHIA-HSIANG YANG | Int. Solid-State Circuits Conference (ISSCC) | 8 | 0 | |
2023 | A 169mW Fully-Integrated Ultrasound Imaging Processor Supporting Advanced Modes for Hand-Held Devices | Lo, Yi Lin; Lo, Yu Chen; CHIA-HSIANG YANG | Digest of Technical Papers - Symposium on VLSI Technology | 0 | 0 | |
2020 | A 2.17-mw acoustic dsp processor with cnn-fft accelerators for intelligent hearing assistive devices | Lee, Y.-C.; Chi, T.-S.; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | | | |
2019 | A 2.17mW Acoustic DSP Processor with CNN-FFT Accelerators for Intelligent Hearing Aided Devices | Lee, Y.-C.; Chi, T.-S.; CHIA-HSIANG YANG | Proceedings 2019 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2019 | | | |
2019 | A 2.25 TOPS/W fully-integrated deep CNN learning processor with on-chip training | Lu C.-H; Wu Y.-C; CHIA-HSIANG YANG | Proceedings - 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019 | 14 | 0 | |
2024 | 2.6 A 131mW 6.4Gbps 256×32 Multi-User MIMO OTFS Detector for Next-Gen Communication Systems | Lee, Tang; Chen, Ting Yang; I-HSUAN LIU; CHIA-HSIANG YANG | Digest of Technical Papers - IEEE International Solid-State Circuits Conference | | | |
2014 | 24.5 A 0.5V 1.27mW nose-on-a-chip for rapid diagnosis of ventilator-associated pneumonia | CHIA-HSIANG YANG | IEEE International Solid-State Circuits Conference | | | |