Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
2004 | Global elimination algorithm and architecture design for fast block matching motion estimation | Huang, Yu-Wen; SHAO-YI CHIEN ; Hsieh, Bing-Yu; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 73 | 53 | |
2011 | Gradient-based video text localization algorithm with statistical analysis of text-like features | Li, C.-H.; Huang, Y.-L.; Chien, S.-Y.; SHAO-YI CHIEN | IEEE International Conference on Consumer Electronics | 0 | 0 | |
2020 | GrateTile: Efficient Sparse Tensor Tiling for CNN Processing | Lin Y.-S; Lu H.-C; Tsao Y.-B; Chih Y.-M; Chen W.-C; SHAO-YI CHIEN | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | 5 | 0 | |
2012 | Guest editorial: Special issue for the 23 rd VLSI design/CAD symposium (VLSI design/CAD 2012) | Lee, T.-C.; Chien, S.-Y.; Yang, C.-L.; SHAO-YI CHIEN | International Journal of Electrical Engineering | 0 | | |
2012 | Guest editorial: Special issue for the 23<sup>rd</sup> VLSI design/CAD symposium (VLSI design/CAD 2012) | Lee, T.-C.; Chien, S.-Y.; Yang, C.-L.; SHAO-YI CHIEN | International Journal of Electrical Engineering | | | |
2011 | Guest editorial: Special issue on computing architectures for real-time video/image analysis | Chien, S.-Y.; Kyo, S.; Tsai, T.-H.; SHAO-YI CHIEN | Journal of Signal Processing Systems | 0 | 0 | |
2021 | HARD SAMPLES RECTIFICATION FOR UNSUPERVISED CROSS-DOMAIN PERSON RE-IDENTIFICATION | Liu C.-T; Lee M.-Y; Chen T.-S; SHAO-YI CHIEN | Proceedings - International Conference on Image Processing, ICIP | 2 | 0 | |
2008 | Hardware architecture design and implementation of ray-triangle intersection with bounding volume hierarchies | Chang, Chen-Haur; Lee, Chuan-Yiu; Chien, Shao-Yi; SHAO-YI CHIEN | RT'08 - IEEE/EG Symposium on Interactive Ray Tracing 2008 | 1 | 0 | |
2011 | Hardware architecture design of frame rate up-conversion for high definition videos with global motion estimation and compensation | Hsu, Kung-Yen; Chien, Shao-Yi; SHAO-YI CHIEN | 2011 IEEE Workshop on Signal Processing Systems, SiPS 2011 | 7 | 0 | |
2012 | Hardware architecture design of hybrid distributed video coding with frame level coding mode selection | Chiu, C.-C.; Wu, H.-F.; Chien, S.-Y.; Lee, C.-H.; Somayazulu, V.S.; Chen, Y.-K.; SHAO-YI CHIEN | 2012 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA ASC 2012 | | | |
2005 | Hardware architecture design of video compression for multimedia communication systems | Chen, Liang-Gee; Chen, Homer H.; Chen, Ching-Yeh; Huang, Yu-Wen; LIANG-GEE CHEN ; Chien, Shao-Yi | IEEE Communications Magazine | 40 | 30 | |
2004 | Hardware architecture for global motion estimation for MPEG-4 Advanced Simple Profile | Chen, Ching-Yeh; Chien, Shao-Yi ; Chao, Wei-Min; Huang, Yu-Wen; Chen, Liang-Gee | IEEE International Symposium on Circuits and Systems | | | |
2020 | Hardware Feasibility Analysis of Spatial Propagation Algorithms | Lin, C.-T.; SHAO-YI CHIEN | Proceedings - 2020 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2020 | 0 | 0 | |
2012 | Hardware-efficient true motion estimator based on Markov Random Field motion vector correction | Chen, F.-C.; Huang, Y.-L.; Chien, S.-Y.; SHAO-YI CHIEN | 2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 | 2 | 0 | |
2018 | Hardware-Efficient Two-Stage Saliency Detection | Wu, S.-Y.; Lin, Y.-S.; Tu, W.-C.; Chien, S.-Y.; SHAO-YI CHIEN | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | 1 | 0 | |
2008 | Hardware-oriented image inpainting for perceptual I-frame error concealment | Chen, Ching-Yi; Wu, Guan-Lin; Chien, Shao-Yi; SHAO-YI CHIEN ; Chen, Ching-Yi | IEEE International Symposium on Circuits and Systems | 4 | 0 | |
2013 | HD video decoding scheme based on mobile heterogeneous system architecture | Chen, Y.-J.; Lin, Y.-S.; Wu, H.-F.; Chang, C.-M.; Chien, S.-Y.; SHAO-YI CHIEN | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | 1 | 0 | |
2008 | High performance hardware architecture of linear filters for intelligent video processing | Chen, T.-W.; Chien, S.-Y.; SHAO-YI CHIEN | Lecture Notes in Computer Science | 1 | 0 | |
2007 | High performance low cost video analysis core for smart camera chips in distributed surveillance network | Chan, Wei-Kai; Chien, Shao-Yi; SHAO-YI CHIEN | 2006 IEEE 8th Workshop on Multimedia Signal Processing, MMSP 2006 | 4 | 0 | |
2009 | High performance silicon intellectual property for K-nearest neighbor algorithm | Chen, Tse-Wei; Tang, Chi-Sun; Chien, Shao-Yi; SHAO-YI CHIEN | IEEE International Conference on Consumer Electronics | 0 | 0 | |