第 1 到 20 筆結果,共 20 筆。
公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 | |
---|---|---|---|---|---|---|---|
1 | 2014 | Hydra: An energy-efficient programmable cryptographic coprocessor supporting elliptic-curve pairings over fields of large characteristics | CHEN-MOU CHENG ; AN-YEU(ANDY) WU ; Chang, Y.-A.; Hong, W.-C.; Hsiao, M.-C.; Yang, B.-Y.; Wu, A.-Y.; CHEN-MOU CHENG ; AN-YEU(ANDY) WU | Lecture Notes in Computer Science | |||
2 | 2014 | Low-complexity motion-compensated beamforming algorithm and architecture for synthetic transmit aperture in ultrasound imaging | Chen, Y.-H.; Lin, Y.-M.; Ho, K.-Y.; Wu, A.-Y.; PAI-CHI LI ; AN-YEU(ANDY) WU | IEEE Transactions on Signal Processing | |||
3 | 2013 | Editorial low-power, intelligent, and secure solutions for realization of internet of things | AN-YEU(ANDY) WU ; Chen, Y.-K.; Wu, A.-Y.; Bayoumi, M.A.; Koushanfar, F.; AN-YEU(ANDY) WU | IEEE Journal on Emerging and Selected Topics in Circuits and Systems | |||
4 | 2013 | Securing M2M with post-quantum public-key cryptography | CHEN-MOU CHENG ; AN-YEU(ANDY) WU ; Shih, J.-R.; Hu, Y.; Hsiao, M.-C.; Chen, M.-S.; Shen, W.-C.; Yang, B.-Y.; Wu, A.-Y.; CHEN-MOU CHENG ; AN-YEU(ANDY) WU | IEEE Journal on Emerging and Selected Topics in Circuits and Systems | 16 | ||
5 | 2012 | Foreword | AN-YEU(ANDY) WU ; Wu, A.-Y.; Wang, L.-C.; AN-YEU(ANDY) WU | 2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 | |||
6 | 2009 | Low-power memory-reduced traceback MAP decoding for double-binary convolutional turbo decoder | AN-YEU(ANDY) WU ; Lin, C.-H.; Chen, C.-Y.; Wu, A.-Y.; Tsai, T.-H.; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems I: Regular Papers | |||
7 | 2009 | PAC Duo SoC performance analysis with ESL design methodology | AN-YEU(ANDY) WU ; Chuang, I.-Y.; Chang, C.-W.; Fan, T.-Y.; Yeh, J.-C.; Ji, K.-M.; Ma, J.-L.; Wu, A.-Y.; Lin, S.-Y.; AN-YEU(ANDY) WU | ASICON 2009 - 8th IEEE International Conference on ASIC | |||
8 | 2007 | A clock-fault tolerant architecture and circuit for reliable nanoelectronics system | AN-YEU(ANDY) WU ; Ang, W.T.; Rao, H.F.; Yu, C.; Liu, J.; Wey, I.-C.; Wu, A.-Y.; Zhao, H.; Chen, J.; AN-YEU(ANDY) WU | 2007 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2007 | |||
9 | 2007 | Ensemble dependent matrix methodology for probabilistic-based fault-tolerant nanoscale circuit design | AN-YEU(ANDY) WU ; Rao, H.; Chen, J.; Yu, C.; Ang, W.T.; Wey, I.-C.; Wu, A.-Y.; Zhao, H.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
10 | 2007 | A 0.13μm hardware-efficient probabilistic-based noise-tolerant circuit design and implementation with 24.5dB noise-immunity improvement | AN-YEU(ANDY) WU ; Wey, I.-C.; Chen, Y.-G.; Yu, C.; Chen, J.; Wu, A.-Y.; AN-YEU(ANDY) WU | 2007 IEEE Asian Solid-State Circuits Conference | |||
11 | 2007 | Multilevel LINC system design for wireless transmitters | Chen, Y.-J.; Jheng, K.-Y.; Wu, A.-Y.; Tsao, H.-W.; Tzeng, B.; HEN-WAI TSAO ; AN-YEU(ANDY) WU | 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 | |||
12 | 2007 | A power-aware reconfigurable rendering engine design with 453MPixels/s, 16.4MTriangles/s performance | AN-YEU(ANDY) WU ; Chao, C.-H.; Kuo, Y.-L.; Wu, A.-Y.; Chien, W.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
13 | 2006 | DSP engine design for LINC wireless transmitter systems | AN-YEU(ANDY) WU ; Jheng, K.-Y.; Wang, Y.-C.; Wu, A.-Y.; Tsao, H.-W.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
14 | 2006 | A robust band-tracking packet detector (BT-PD) in OFDM-based ultra-wideband systems | AN-YEU(ANDY) WU ; Lai, J.-T.; Chu, N.-Y.; Wu, A.-Y.; Chen, W.-C.; AN-YEU(ANDY) WU | 2006 IEEE Workshop on Signal Processing Systems Design and Implementation | |||
15 | 2006 | A low cost packet detector in OFDM-based ultra-wideband systems | AN-YEU(ANDY) WU ; Lai, J.-T.; Chu, N.-Y.; Wu, A.-Y.; Chen, W.-C.; AN-YEU(ANDY) WU | 2006 IEEE Workshop on Signal Processing Systems Design and Implementation | |||
16 | 2006 | High-performance VLSI architecture of decision feedback equalizer for gigabit systems | AN-YEU(ANDY) WU ; Lin, C.-H.; Wu, A.-Y.; Li, F.-M.; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems II: Express Briefs | |||
17 | 2004 | High-Performance VLSI Architecture of Adaptive Decision Feedback Equalizer Based on Predictive Parallel Branch Slicer (PPBS) Scheme | AN-YEU(ANDY) WU ; Yang, M.-D.; Wu, A.-Y.; Lai, J.-T.; AN-YEU(ANDY) WU | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | |||
18 | 2004 | Fast Convergent Pipelined Adaptive DFE Architecture Using Post-Cursor Processing Filter Technique | AN-YEU(ANDY) WU ; Yang, M.-D.; Wu, A.-Y.; Lai, J.-T.; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing | |||
19 | 2003 | A novel multipath matrix algorithm for exact room response identification in stereo echo cancellation | AN-YEU(ANDY) WU ; Lai, J.-T.; Wu, A.-Y.; Yeh, C.-C.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
20 | 2002 | A unified view for vector rotational CORDIC algorithms and architectures based on angle quantization approach | AN-YEU(ANDY) WU ; Wu, A.-Y.; Wu, C.-S.; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications |