https://scholars.lib.ntu.edu.tw/handle/123456789/498462
標題: | Voltage Transfer Characteristic Matching by Different Nanosheet Layer Numbers of Vertically Stacked Junctionless CMOS Inverter for SoP/3D-ICs applications | 作者: | Sung, P.-J. Chang, C.-Y. Chen, L.-Y. Kao, K.-H. Su, C.-J. Liao, T.-H. Fang, C.-C. Wang, C.-J. Hong, T.-C. Jao, C.-Y. Hsu, H.-S. Luo, S.-X. Wang, Y.-S. Huang, H.-F. Li, J.-H. Huang, Y.-C. Hsueh, F.-K. Wu, C.-T. Huang, Y.-M. Hou, F.-J. Luo, G.-L. Huang, Y.-C. Shen, Y.-L. Ma, W.C.-Y. Huang, K.-P. Lin, K.-L. Samukawa, S. Li, Y. Huang, G.-W. Lee, Y.-J. Li, J.-Y. Wu, W.-F. Shieh, J.-M. Chao, T.-S. Yeh, W.-K. Wang, Y.-H. JIUN-YUN LI |
公開日期: | 2019 | 卷: | 2018-December | 起(迄)頁: | 21.4.1-21.4.4 | 來源出版物: | Technical Digest - International Electron Devices Meeting, IEDM | URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/498462 | DOI: | 10.1109/IEDM.2018.8614553 |
顯示於: | 電機工程學系 |
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