https://scholars.lib.ntu.edu.tw/handle/123456789/632153
標題: | An 8kb spin-orbit-torque magnetic random-access memory | 作者: | Chen G.-L Wang I.-J Yeh P.-S Li S.-H Yang S.-Y Hsin Y.-C Wu H.-T Hsiao H.-M Chang Y.-J Chen K.-M Rahaman S.K.Z Lee H.-H Su Y.-H Chen F.-M Wei J.-H Sheu S.-S CHIH-I WU Tang D. |
公開日期: | 2021 | 來源出版物: | VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings | 摘要: | We'd built 8kb spin-orbit-torque (SOT) MRAM chips to evaluate our cell design and the process recipes to integrate them on CMOS wafer. For the SOT cell, the switching threshold is well correlated to the tungsten channel resistivity. We will show the cell design, integration process to CMOS wafers and the cell properties and array statistics. In this cell and array designs, we show the low switching current capability for the low power application and good thermal stability. © 2021 IEEE. |
URI: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-85108149546&doi=10.1109%2fVLSI-TSA51926.2021.9440096&partnerID=40&md5=694c30aed9d172da9ec17d6b1505f704 https://scholars.lib.ntu.edu.tw/handle/123456789/632153 |
DOI: | 10.1109/VLSI-TSA51926.2021.9440096 | SDG/關鍵字: | CMOS integrated circuits; Integrated circuit design; Magnetic storage; MRAM devices; Spin orbit coupling; VLSI circuits; Array design; Channel resistivity; Integration process; Low power application; Magnetic random access memory; Spin orbits; Switching currents; Switching thresholds; Random access storage |
顯示於: | 電機工程學系 |
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