公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2000 | Rectilinear block placement using B*-trees | Wu, Guang-Ming; Chang, Yun-Chih; Chang, Yao-Wen; YAO-WEN CHANG | IEEE International Conference on Computer Design: VLSI in Computers and Processors | 9 | | |
2003 | Rectilinear block placement using B*-trees | Wu, G.-M.; Chang, Y.-C.; Chang, Y.-W.; YAO-WEN CHANG | ACM Transactions on Design Automation of Electronic Systems | 25 | 21 | |
2000 | Rectilinear Block Placement Using B*-Trees. | Wu, Guang-Ming; Chang, Yun-Chih; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000 | 0 | 0 | |
2016 | Redistribution layer routing for integrated fan-out wafer-level chip-scale packages | Lin, B.-Q.; Lin, T.-C.; Chang, Y.-W.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD | 12 | 0 | |
2017 | Redistribution layer routing for wafer-level integrated fan-out package-on-packages | Lin, T.-C.; Chi, C.-C.; Chang, Y.-W. | IEEE/ACM International Conference on Computer-Aided Design | 9 | 0 | |
2010 | Redundant-wires-aware ECO timing and mask cost optimization | Fang, S.-Y.; Chien, T.-F.; Chang, Y.-W.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 15 | 0 | |
2006 | Reliable crosstalk-driven interconnect optimization. | Jiang, Iris Hui-Ru; Pan, Song-Ra; Chang, Yao-Wen; HUI-RU JIANG ; YAO-WEN CHANG | ACM Trans. Design Autom. Electr. Syst. | 0 | 2 | |
2006 | RLC coupling-aware simulation and on-chip bus encoding for delay reduction | Tu, S.-W.; Jou, J.-Y.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 37 | 23 | |
2005 | Rlc coupling-Aware simulation for on-chip buses and their encoding for delay reduction | Tu, S.-W.; Jou, J.-Y.; Chang, Y.-W.; YAO-WEN CHANG | IEEE International Symposium on Circuits and Systems | 6 | 0 | |
2004 | RLC effects on worst-case switching pattern for on-chip buses | Tu, S.-W.; Jou, J.-Y.; Chang, Y.-W.; YAO-WEN CHANG | IEEE International Symposium on Circuits and Systems | 10 | | |
2021 | A Robust Modulus-Based Matrix Splitting Iteration Method for Mixed-Cell-Height Circuit Legalization | Chen J; Zhu Z; Zhu W; YAO-WEN CHANG | ACM Transactions on Design Automation of Electronic Systems | 7 | 6 | |
2020 | Routability-Aware Pin Access Optimization for Monolithic 3D Designs* | Wang R.-Y; Chang Y.-W.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD | 0 | 0 | |
2008 | Routability-driven analytical placement by net overlapping removal for large-scale mixed-size designs | Jiang, Z.-W.; Su, B.-Y.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 37 | 0 | |
2008 | Routability-driven analytical placement by net overlapping removal for large-scale mixed-size designs. | Jiang, Zhe-Wei; Su, Bor-Yiing; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008 | 0 | 0 | |
2011 | Routability-driven analytical placement for mixed-size circuit designs | Hsu, M.-K.; Chou, S.; Lin, T.-H.; Chang, Y.-W.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 63 | 0 | |
2014 | Routability-driven blockage-aware macro placement | Chen, Y.-F.; Huang, C.-C.; Chiou, C.-H.; Wang, C.-J.; YAO-WEN CHANG | Design Automation Conference | 18 | 0 | |
2013 | Routability-driven placement for hierarchical mixed-size circuit designs | Hsu, M.-K.; Chen, Y.-F.; Huang, C.-C.; Chen, T.-C.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 27 | 0 | |
2008 | Routing for chip-package-board co-design considering differential pairs | Fang, J.-W.; Ho, K.-H.; Chang, Y.-W.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 22 | 0 | |
2009 | Routing for manufacturability and reliability | Chen, H.-Y.; Chang, Y.-W.; YAO-WEN CHANG | IEEE Circuits and Systems Magazine | 8 | 8 | |
2015 | Routing-architecture-aware analytical placement for heterogeneous FPGAS | Chen, S.-Y.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 18 | 0 | |