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來源出版物
scopus
WOS
全文
2014
A 3X-oversampling hybrid clock and data recovery circuit with programmable bandwidth
J-A Cheng; W-S Chang; TAI-CHENG LEE
IEEE VLSI-DAT
2007
A 4-Channel Poly-Phase Filter for Cognitive Radio Systems
G-J Chen; H-H Chiu; TAI-CHENG LEE
IEEE VLSI-DAT
2008
A 4-PAM Adaptive Analog Equalizer for Backplane Interconnections
Y-C Huang; Q-T Chen; TAI-CHENG LEE
IEEE VLSI-DAT
2001
A 4-Tap 125-MHz Mixed-Signal Echo Canceller for Gigabit Ethernet on Copper Wire
TAI-CHENG LEE
; B. Razavi
IEEE Journal of Solid-State Circuits
2005
A 40-GHz Distributed-Load Static Divider
TAI-CHENG LEE
; etal
IEEE Asian Solid-State Circuit Conference
2006
A 6-b 1.3Gs/s A/D Converter with C-2C Switch–Capacitor Technique
Y-M Liao; TAI-CHENG LEE
IEEE VLSI-DAT
2006
A 6-b 800-MS/s Pipelined A/D Converter with Open-loop Amplifiers
D-L Shen; TAI-CHENG LEE
IEEE Symposium on VLSI Circuits
25
2007
A 6-b 800-MS/s Pipelined A/D Converter with Open-Loop Amplifiers
D.-L. Shen; TAI-CHENG LEE
IEEE Journal of Solid-State Circuits
28
25
2008
A 6-bit Pipelined Analog-to-Digital Converter with Current-Switching Open-Loop Residue Amplification
Feng-Chiu Hsieh; Tai-Cheng; TAI-CHENG LEE
IEEE Asian Solid-State Circuit Conference
2014
A 6-Gb/s Adaptive-Loop-Bandwidth Clock and Data Recovery (CDR) Circuits
L-H Chiueh; TAI-CHENG LEE
IEEE Asian Solid-State Circuit Conference
2012
A 6-GHz All Digital PLL for Spread Spectrum Clock Generators (SSCG)
C-D Su; C-W Lee; TAI-CHENG LEE
International Journal of Electrical Engineering
2013
A 6-GHz Self-Oscillating Spread-Spectrum Clock Generator
C-H Wong; TAI-CHENG LEE
IEEE Transactions on Circuits and Systems, Part I
5
2008
A clock and data recovery circuit with wide linear range frequency detector
K-J Hsiao; M-H Lee; TAI-CHENG LEE
IEEE VLSI-DAT
2014
A Compact Multi-Input Thermoelectric Energy Harvesting System with 58.5% Power Conversion Efficiency and 32.4-mW Output Power Capability
C-L Chang; TAI-CHENG LEE
International Symposium on Integrated Circuits
2007
A Delay-Line-Based GFSK Demodulator for Low-IF Receivers
H-S Kao; M-J Yang; TAI-CHENG LEE
International Solid-State Circuit Conference (ISSCC)
2005
A DLL-Based Frequency Multiplier For MBOA-UWB System
K-J Hsiao; TAI-CHENG LEE
IEEE Symposium on VLSI Circuits
13
0
2007
A Fully Integrated 36MHz to 230MHz Multiplying DLL with Adaptive Current Tuning
K-J Hsiao; TAI-CHENG LEE
Symposium on VLSI Circuits
2008
A Fully Integrated 36MHz to 230MHz Multiplying DLL with Adaptive Current Tuning
K-J Hsiao; TAI-CHENG LEE
IEEE Journal of Solid-State Circuits
2005
A Linear-Approximation Technique for Digitally-Calibrated Pipelined ADCs
D. L. Shen; TAI-CHENG LEE
Proceedings - IEEE International Symposium on Circuits and Systems
7
0
2009
A Low-Jitter 8GHz to 10GHz Distributed DLL for Multiple-Phase Clock Generation
K-J Hsian; TAI-CHENG LEE
IEEE Journal of Solid-State Circuits