公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2006 | Temperature-aware placement for SOCs | Tsai, J.-L.; Chen, C.C.-P.; Chen, G.; Goplen, B.; Qian, H.; Zhan, Y.; Kang, S.-M.; Wong, M.D.F.; Sapatnekar, S.S.; CHUNG-PING CHEN | Proceedings of the IEEE | | | |
2003 | The Power Grid Transient Simulation in Linear Time based on 3D Alternating-Direction-Implicit Method | Yu-Min Lee; CHUNG-PING CHEN | Design, Automation and Test in Europe Conference and Exhibition (DATE) | | | |
2004 | Thermal and Power Integrity based Power/Ground Networks Optimization | Ting-Yuan Wang; Jeng-Liang Tsai; CHUNG-PING CHEN | Design, Automation and Test in Europe Conference and Exhibition (DATE) | | | |
2001 | Thermal-ADI: A Linear-Time Chip-Level Dynamic Thermal Simulation Algorithm Based on Alternating-Direction-Implicit (ADI) Method | Ting-Yuan Wang; CHUNG-PING CHEN | ACM International Symposium on Physical Design (ISPD) | | | |
2003 | Thermal-ADI: A Linear-Time Chip-Level Dynamic Thermal Simulation Algorithm Based on Alternating-Direction-Implicit (ADI) Method | Ting-Yuan Wang; CHUNG-PING CHEN | IEEE Transaction on Very Large Scale Integration Systems (TVLSI) | | 39 | |
2019 | A transient enhancement DC-DC buck converter with dual operating modes control technique | Hsu, Y.-C.; Ting, C.-Y.; Hsu, L.-S.; Lin, J.-Y.; CHUNG-PING CHEN | IEEE Transactions on Circuits and Systems II: Express Briefs | 26 | 22 | |
2004 | Wave-pipelined On-Chip Global Interconnect | Lizheng Zhang; Yuhen Hu; CHUNG-PING CHEN | ACM/IEEE TAU Workshop on Timing Issues in the Specification and Synthesis of Digital Systems | | | |
2005 | Wave-Pipelined On-Chip Global Interconnect | Lizheng Zhang; Yu-Hen Hu; CHUNG-PING CHEN | ASPDAC | | | |
2006 | Welcome Notes | Karnik, T.; Chen, C.C.-P.; Alexiou, G.; Kahng, A.; Iranmanesh, A.; CHUNG-PING CHEN | Proceedings - International Symposium on Quality Electronic Design, ISQED | | | |
2007 | Welcome notes ISQED07 | Chen, C.C.-P.; Srikantam, V.; Karnik, T.; Pedram, M.; Iranmanesh, A.; Mexiou, G.; CHUNG-PING CHEN | Proceedings - Eighth International Symposium on Quality Electronic Design, ISQED 2007 | | | |
2005 | Yield-driven, false-path-aware clock skew scheduling | Tsai, J.-L.; Baik, D.H.; Chen, C.C.-P.; Saluja, K.K.; CHUNG-PING CHEN | IEEE Design and Test of Computers | | | |
2004 | Zero-Skew Clock-Tree Optimization with Buffer-Insertion/Sizing and Wire-Sizing | Jeng-Laing Tsai; Tsung-Hao Chen; CHUNG-PING CHEN | IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems (TCAD) | | | |
2004 | 子計畫二:時序就是一切:論電源震盪,雜訊,及溫度對時序
之影響(1/3) | 陳中平 | | | | |
2005 | 子計畫二:時序就是一切:論電源震盪,雜訊,及溫度對時序
之影響(2/3) | 陳中平 | | | | |
2004 | 整合電腦架構及實體佈局共同合成之環境(1/3) | 陳中平 | | | | |
2005 | 整合電腦架構及實體佈局共同合成之環境(2/3) | 陳中平 | | | | |
2008 | 落花生二苯乙烯類對HL-60細胞株的影響 | 鍾秉真; Chung, Ping-Chen | | | | |
2008 | 超大型積體電路製程偏差統計型時序分析(I) | 陳中平 | | | | |