公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2017 | Homing Sequence Derivation with Quantified Boolean Satisfiability | Hung-En Wang; Kuan-Hua Tu; Jie-Hong R. Jiang; Natalia Kushik; JIE-HONG JIANG ; 江介宏 | IFIP International Conference on Testing of Software and Systems (ICTSS) | 7 | 0 | |
2021 | Homing Sequence Derivation with Quantified Boolean Satisfiability | Tu K; Wang H; Jiang J.R; Kushik N; Yevtushenko N.; JIE-HONG JIANG | IEEE Transactions on Computers | | | |
2015 | Hybrid Simulations of Heterogeneous Biochemical Models in SBML | Hui-Ju Katherine Chiang; Francois Fages; Jie-Hong Roland Jiang; Sylvain Soliman; JIE-HONG JIANG | ACM Transactions on Modeling and Computer Simulation | | 1 | |
2012 | Improving Design Verifiability by Early RTL Coverability Analysis | Kai-Hui Chang; Chia-Wei Chang; Jie-Hong R. Jiang; Chien-Nan Jimmy Liu; JIE-HONG JIANG | ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE'12) | 0 | 0 | |
2007 | Inductive Equivalence Checking under Retiming and Resynthesis | Jie-Hong R. Jiang; Wei-Lun Hung; JIE-HONG JIANG | IEEE/ACM Int'l Conf. on Computer-Aided Design (ICCAD'07) | 11 | 0 | |
2009 | Interpolating Functions from Large Boolean Relations | Jie-Hong R. Jiang; Hsuan-Po Lin; Wei-Lun Hung; JIE-HONG JIANG | Int'l Conf. on Computer-Aided Design (ICCAD'09) | 38 | 0 | |
2020 | Learning to Automate the Design Updates from Observed Engineering Changes in the Chip Development Cycle | Kravets, V.N.; Jiang, J.-H.R.; Riener, H.; JIE-HONG JIANG | Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020 | | | |
2009 | Logic Synthesis in a Nutshell | Jie-Hong R. Jiang; Srinivas Devadas; JIE-HONG JIANG | | | | |
2009 | Logic Synthesis in a Nutshell | Jiang, J.H.; Devadas, S.; JIE-HONG JIANG | Electronic Design Automation | | | |
2021 | Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization | JIE-HONG JIANG | Proceedings -Design, Automation and Test in Europe, DATE | | | |
2018 | Logic Synthesis of Binarized Neural Networks for Efficient Circuit Implementation | C.-C. Chi; J.-H. R. Jiang; JIE-HONG JIANG ; 江介宏 | 37th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2018 | 17 | 0 | |
2021 | Logic Synthesis of Binarized Neural Networks for Efficient Circuit Implementation | Chi C; JIE-HONG JIANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | | | |
2017 | Logic Synthesis of Recombinase Based Genetic Circuits | Tai-Yin Chiu; Jie-Hong R. Jiang; JIE-HONG JIANG ; 江介宏 | Scientific Reports | 8 | 7 | |
2020 | Mining Biochemical Circuits from Enzyme Databases via Boolean Reasoning | Lin Y.-C; JIE-HONG JIANG | IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD | | | |
2004 | On Breakable Cyclic Definitions | Jie-Hong R. Jiang; Alan Mishchenko; Robert K. Brayton; JIE-HONG JIANG | IEEE/ACM Int'l Conf. on Computer-Aided Design (ICCAD'04) | 7 | 0 | |
2005 | On Some Transformation Invariants under Retiming and Resynthesis | JIE-HONG JIANG | Int'l Conf. on Tools and Algorithms for the Construction and Analysis of Systems (TACAS'05) | | | |
2013 | On the Hybrid Composition and Simulation of Heterogeneous Biochemical Models | Hui-Ju Katherine Chiang; Francois Fages; Jie-Hong R. Jiang; Sylvain Soliman; JIE-HONG JIANG | International Conference on Computational Methods in Systems Biology (CMSB) | 1 | 0 | |
2003 | On the Verification of Sequential Equivalence | JIE-HONG JIANG ; Robert K. Brayton | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 23 | 22 | |
2002 | Optimization of multi-valued multi-level networks | Gao, M.; Jiang, J.-H.; Jiang, Y.; Li, Y.; Mishchenko, A.; Sinha, S.; Villa, T.; Brayton, R.; JIE-HONG JIANG | Proceedings of The International Symposium on Multiple-Valued Logic | | | |
1999 | Optimum loading dispersion for high-speed tree-type decision circuitry. | Jiang, Jie-Hong Roland; JIE-HONG JIANG ; HUI-RU JIANG | Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999, San Jose, California, USA, November 7-11, 1999 | 0 | 0 | |