公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2020 | Learning to Automate the Design Updates from Observed Engineering Changes in the Chip Development Cycle | Kravets, V.N.; Jiang, J.-H.R.; Riener, H.; JIE-HONG JIANG | Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020 | | | |
2018 | Recombinase-based genetic circuit optimization | Lai, C.-N.; Jiang, J.-H.R.; Fages, F.; JIE-HONG JIANG | 2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Proceedings | | | |
2003 | Reducing multi-valued algebraic operations to binary | Jiang, J.-H.R.; Mischenko, A.; Brayton, R.K.; JIE-HONG JIANG | Proceedings -Design, Automation and Test in Europe, DATE | | | |
2012 | Reducing test point overhead with don't-cares | Chang, K.-H.; Chang, C.-W.; Jiang, J.-H.R.; Liu, C.-N.J.; JIE-HONG JIANG | Midwest Symposium on Circuits and Systems | | | |
2016 | Simultaneous EUV flare variation minimization and CMP control by coupling-aware dummification | Chiang, H.-J.K.; Liu, C.-Y.; Jiang, J.-H.R.; Chang, Y.-W.; YAO-WEN CHANG ; JIE-HONG JIANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 5 | 4 | |
2012 | TRECO: Dynamic technology remapping for timing engineering change orders | Ho, K.-H.; Jiang, J.-H.R.; Chang, Y.-W.; YAO-WEN CHANG ; JIE-HONG JIANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 8 | 8 | |