Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
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2008 | Power integrity chip-package-PCB co-Simulation for I/O interface of DDR3 high-speed memory | H.-H. Chuang; S.-J. Wu; M.-Z. Hong; D. Hsu; R. Huang; TZONG-LIN WU | Elect. Design Adv. Packag. Systems Symp. |