Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
---|---|---|---|---|---|---|
2023 | Quantized Neural Network Synthesis for Direct Logic Circuit Implementation | Huang, Yu Shan; JIE-HONG JIANG ; Mishchenko, Alan | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 0 | 0 | |
2003 | Reducing Multi-Valued Algebraic Operations to Binary. | Jiang, Jie-Hong Roland; Mishchenko, Alan; Brayton, Robert K.; JIE-HONG JIANG | 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany |