Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
---|---|---|---|---|---|---|
2019 | Effective FPGA Resource Utilization for Quasi Delay Insensitive Implementation of Asynchronous Circuits. | Chang, Yi-Fan Evan; Huang, Ruei-Yang; JIE-HONG JIANG | 25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019, Hirosaki, Japan, May 12-15, 2019 | |||
2014 | 透過平衡態生化反應之多項式取值 | 黃瑞陽; Huang, Ruei-Yang |