公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2003 | A simulation-based temporal assertion checker for PSL | Chang, Kai-Hui; Tu, Wei-Ting; Yeh, Yi-Jong; Kuo, Sy-Yen | 46th IEEE International Midwest Symposium on Circuits and Systems, 2003. MWSCAS '03 | 0 | 0 | |
2001 | An optimization-based low-power voltage scaling technique using multiple supply voltages | Yeh, Yi-Jong; Kuo, Sy-Yen | The IEEE International Symposium on Circuits and Systems, 2001 | 14 | 0 | |
2002 | An Optimization-based Multiple-Voltage Scaling Technique for Low Power CMOS Digital Design | Yeh, Yi-Jong; Kuo, Sy-Yen | Journal of Circuits, Systems | | | |