Influence of annealing conditions on the bias temperature stability of MgZnO thin film transistors

We report the experimental results regarding the stability of backchannel cut bottom gate thin film transistors (TFTs) with Mg0.05Zn0.95O active layers. The TFTs are all fabricated at room temperature. Two different thermal annealing conditions are applied to the devices, 200 ¢XC for 5 hours and 350 ¢XC for half an hour. In both annealing conditions, the devices show similar electric characteristics initially. Nevertheless, 350 ¢XC annealed TFTs show much better stability under gate bias stressing. When gate-bias stressing is applied to TFTs at 80 ¢XC, the transfer curves exhibit much more significant humps at subthreshold regimes for 200 ¢XC annealed TFTs compared to 350 ¢XC annealed TFTs. It is highly suspected that the humps may be due to the two phase nature of as-sputtered MgZnO thin film. 350 ¢XC annealing may transform the two phase mixture into single phase, leading to more stable TFTs. ? The Electrochemical Society.