https://scholars.lib.ntu.edu.tw/handle/123456789/152566
標題: | Quantum Boolean circuit construction and layout under locality constraint | 作者: | Tsai, I-Ming Kuo, Sy-Yen |
公開日期: | 十月-2001 | 起(迄)頁: | - | 來源出版物: | 1st IEEE Conference on Nanotechnology, IEEE-NANO 2001 | 摘要: | The discovery of Shor's prime factorization and Grover's fast database search algorithm have made quantum computing the most rapidly expanding research field recently. Nanotechnology, in particular silicon-based nanoscale device, has been proposed as one of the candidates that can be used to implement a quantum computer. In this paper, we have derived a systematic procedure to realize any general m-to-n bit combinational boolean logic using elementary quantum gates. The quantum circuit layout under the locality constraint is then formulated, together with the gate count evaluation function, to reduce the total number of quantum gates required to implement the circuit. © 2001 IEEE. |
URI: | http://ntur.lib.ntu.edu.tw//handle/246246/2007041910021343 https://www.scopus.com/inward/record.uri?eid=2-s2.0-57649145355&doi=10.1109%2fNANO.2001.966403&partnerID=40&md5=f784cffe7504baa4cdd143937d0209ee |
ISSN: | 19449399 | 其他識別: | N/A | DOI: | 10.1109/NANO.2001.966403 | SDG/關鍵字: | Algorithms; Computation theory; Logic circuits; Logic gates; Quantum computers; Quantum electronics; Quantum optics; Quantum theory; Search engines; Database search algorithms; Evaluation function; Nanoscale device; Prime factorization; Quantum Boolean circuits; Quantum circuit; Quantum Computing; Research fields; Nanotechnology |
顯示於: | 電機工程學系 |
檔案 | 描述 | 大小 | 格式 | |
---|---|---|---|---|
00966403.pdf | 362.62 kB | Adobe PDF | 檢視/開啟 |
在 IR 系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。