https://scholars.lib.ntu.edu.tw/handle/123456789/289909
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Jih-Ming, F.U. | en_US |
dc.contributor.author | Lee Trong-Yen | en_US |
dc.contributor.author | Hsiung, P.-A. | en_US |
dc.contributor.author | SAO-JIE CHEN | - |
dc.creator | Jih-Ming, F.U.;Lee Trong-Yen;Hsiung, P.-A.;Chen, S.-J. | - |
dc.date.accessioned | 2018-09-10T03:29:31Z | - |
dc.date.available | 2018-09-10T03:29:31Z | - |
dc.date.issued | 2000 | - |
dc.identifier.issn | 09168532 | - |
dc.identifier.uri | http://www.scopus.com/inward/record.url?eid=2-s2.0-0034272095&partnerID=MN8TOARS | - |
dc.identifier.uri | http://scholars.lib.ntu.edu.tw/handle/123456789/289909 | - |
dc.description.abstract | Most of current codesign tools or methodologies only support validation in the form of cosimulation and testing of design alternatives. The results of hardware-software codesign of a distributed system are often not verified, because they are not easily verifiable. In this paper, we propose a new formal coverification approach based on linear hybrid automata, and an algorithm for automatically converting codesign results to the linear hybrid automata framework. Our coverification approach allows automatic verification of real-time constraints such as hard deadlines. Another advantage is that the proposed approach is suitable for verifying distributed systems with arbitrary communication patterns and system architecture. The feasibility of our approach is demonstrated through several application examples. The proposed approach has also been successfully used in verifying deadline violations when there are inter-task communications between tasks with different period lengths. | - |
dc.language | en | en |
dc.relation.ispartof | IEICE Transactions on Information and Systems | en_US |
dc.source | AH-Scopus to ORCID | - |
dc.subject | Coverification; Distributed embedded systems; Hard deadline; Hardware-software codesign; Linear hybrid automata | - |
dc.subject.other | Coverification method; Hardware-software codesign; Algorithms; Automata theory; Computer hardware; Computer software; Constraint theory; Distributed computer systems; Embedded systems | - |
dc.title | Hard ware-software timing co-verification of distributed embedded systems | - |
dc.type | journal article | en |
dc.identifier.scopus | 2-s2.0-0034272095 | - |
dc.relation.pages | 1731-1740 | - |
dc.relation.journalvolume | E83-D | - |
dc.relation.journalissue | 9 | - |
item.fulltext | no fulltext | - |
item.openairetype | journal article | - |
item.openairecristype | http://purl.org/coar/resource_type/c_6501 | - |
item.grantfulltext | none | - |
item.cerifentitytype | Publications | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.orcid | 0000-0003-1152-171X | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
顯示於: | 電機工程學系 |
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