https://scholars.lib.ntu.edu.tw/handle/123456789/351955
Title: | 0.5V SOI CMOS Dual-Threshold Circuit Technique Via DTMOS for Design Optimization of Low-Power VLSI System Applications | Authors: | W. J. H. Lin C. Y. Chien J. B. Kuo JAMES-B KUO |
Issue Date: | Jan-2009 | Source: | EUROSOI | URI: | http://scholars.lib.ntu.edu.tw/handle/123456789/351955 |
Appears in Collections: | 電機工程學系 |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.