https://scholars.lib.ntu.edu.tw/handle/123456789/559265
標題: | A Variation-Resilient Microprocessor with a Two-Level Timing Error Detection and Correction System in 28-nm CMOS | 作者: | Hong, C.-Y. Liu, T.-T. TSUNG-TE LIU |
關鍵字: | Adaptive design; energy-efficient; microprocessor; timing error detection and correction (EDAC); variation-resilient | 公開日期: | 2020 | 卷: | 55 | 期: | 8 | 起(迄)頁: | 2285-2294 | 來源出版物: | IEEE Journal of Solid-State Circuits | 摘要: | This article presents a variation-resilient microprocessor architecture with a two-level timing error detection and correction (EDAC) system. The proposed EDAC system first performs circuit-level error correction through time borrowing when a timing error occurs and subsequently employs a system-level error correction scheme if the timing error is relatively large and cannot be resolved within a cycle. Therefore, compared with the existing EDAC approaches, a processor using the proposed EDAC system can achieve better performance and energy efficiency under different operating conditions without incurring significant implementation effort and overhead. The proposed EDAC system was designed and implemented on an ARM Cortex-M0 microprocessor using a 28-nm CMOS process. The measurement results show that the proposed processor achieves 60.5% reduction in energy by operating under a 0.36-V lower supply voltage and at the same frequency as the baseline processor. In addition, it achieves a 37.1% reduction in minimum energy consumption compared to the baseline design. © 1966-2012 IEEE. |
URI: | https://www.scopus.com/inward/record.url?eid=2-s2.0-85089244619&partnerID=40&md5=5bdc2e22486bdb20cf7752098e1075e4 https://scholars.lib.ntu.edu.tw/handle/123456789/559265 |
DOI: | 10.1109/JSSC.2019.2951692 | SDG/關鍵字: | CMOS integrated circuits; Computer architecture; Energy efficiency; Energy utilization; Error correction; Timing circuits; Baseline design; Circuit levels; Different operating conditions; Error-correction schemes; Microprocessor architectures; Minimum energy consumption; Supply voltages; Timing error detection; Error detection |
顯示於: | 電機工程學系 |
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