https://scholars.lib.ntu.edu.tw/handle/123456789/580672
標題: | High Efficiency and Low Overkill Testing for Probabilistic Circuits | 作者: | Lee M.-T Wu C.-H Liu S.-T Hsieh C.-Y CHIEN-MO LI |
關鍵字: | Economic and social effects; Electric power supplies to apparatus; Probability distributions; Timing circuits; High-efficiency; Low-power design; Multivariate hypothesis testing; Output distribution; Test Pattern; Tomographic; Trade off; Low power electronics | 公開日期: | 2020 | 起(迄)頁: | 83-87 | 來源出版物: | Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020 | 摘要: | Probabilistic circuits are a potential solution for low power designs which trade off correctness for power consumption. The behavior of probabilistic circuits are more complicated than deterministic circuits because the former produce different outputs given the same inputs. We need to apply test pattern many times to obtain output distribution of probabilistic circuits. In this paper, we apply multivariate hypothesis testing to reduce pattern repetition. We also reduce overkill by tomographic testing to determine pass or fail of CUT. Experimental results show that our proposed technique can reduce pattern repetition by 82% and reduce overkill by 99%. ? 2020 IEEE. |
URI: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-85096363017&doi=10.1109%2fITC-Asia51099.2020.00026&partnerID=40&md5=bb70c24659684bf5629dcb2d26cfeea2 https://scholars.lib.ntu.edu.tw/handle/123456789/580672 |
DOI: | 10.1109/ITC-Asia51099.2020.00026 |
顯示於: | 電機工程學系 |
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