https://scholars.lib.ntu.edu.tw/handle/123456789/632358
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chang J.-R | en-US |
dc.contributor.author | SHEN-IUAN LIU | en-US |
dc.creator | Chang J.-R;Liu S.-I. | - |
dc.date.accessioned | 2023-06-09T07:47:14Z | - |
dc.date.available | 2023-06-09T07:47:14Z | - |
dc.date.issued | 2022 | - |
dc.identifier.issn | 15497747 | - |
dc.identifier.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-85122277965&doi=10.1109%2fTCSII.2021.3138801&partnerID=40&md5=6c2e9261ab4cc75b9f37b3748c31f236 | - |
dc.identifier.uri | https://scholars.lib.ntu.edu.tw/handle/123456789/632358 | - |
dc.description.abstract | A fast-locking phase-locked loop (PLL) using the proposed phase error compensator (PEC) is presented. The PEC compensates the accumulated phase error during the frequency acquisition process to enhance the settling time of this PLL. This PLL is fabricated in a 40-nm CMOS process. The output frequency of the PLL ranges from 2 to 3 GHz. When this PLL is switched from 2 GHz to 3 GHz, the measured settling time using the PEC is 0.6us which is around 30 reference clock cycles. The power consumption of the PLL is 4.6mW at 3 GHz for a supply of 1V. The integral root-mean-square jitter over 1 kHz to 100 MHz is 2.99ps. © 2004-2012 IEEE. | - |
dc.relation.ispartof | IEEE Transactions on Circuits and Systems II: Express Briefs | - |
dc.subject | Fast-locking; low pass filter; phase error compensator; phase-locked loop; resettable divider | - |
dc.subject.other | Bandpass filters; Circuit oscillations; Clocks; Errors; Locks (fasteners); Oscillistors; Phase comparators; Phase locked loops; Variable frequency oscillators; Voltage dividers; Acquisition process; Charge-pump; Fast-locking; Frequency acquisition; Low-pass filters; Phase error; Phase error compensator; Phase-frequency detectors; Resettable divider.; Settling time; Low pass filters | - |
dc.title | A 2-3 GHz Fast-Locking PLL Using Phase Error Compensator | en_US |
dc.type | journal article | en |
dc.identifier.doi | 10.1109/TCSII.2021.3138801 | - |
dc.identifier.scopus | 2-s2.0-85122277965 | - |
dc.relation.pages | 2026-2030 | - |
dc.relation.journalvolume | 69 | - |
dc.relation.journalissue | 4 | - |
item.cerifentitytype | Publications | - |
item.fulltext | no fulltext | - |
item.openairecristype | http://purl.org/coar/resource_type/c_6501 | - |
item.openairetype | journal article | - |
item.grantfulltext | none | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.dept | Electronics Engineering | - |
crisitem.author.dept | MediaTek-NTU Research Center | - |
crisitem.author.orcid | 0000-0002-3765-2948 | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | Others: University-Level Research Centers | - |
顯示於: | 電機工程學系 |
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