https://scholars.lib.ntu.edu.tw/handle/123456789/637306
標題: | A 8-b-Precision 6T SRAM Computing-in-Memory Macro Using Segmented-Bitline Charge-Sharing Scheme for AI Edge Chips | 作者: | Su, Jian Wei Chou, Yen Chi Liu, Ruhui Liu, Ta Wei Lu, Pei Jung Wu, Ping Chun Chung, Yen Lin Hong, Li Yang Ren, Jin Sheng Pan, Tianlong Jhang, Chuan Jia Huang, Wei Hsing Chien, Chih Han Mei, Peng I. Li, Sih Han Sheu, Shyh Shyuan Chang, Shih Chieh Lo, Wei Chung CHIH-I WU Si, Xin Lo, Chung Chuan Liu, Ren Shuo Hsieh, Chih Cheng Tang, Kea Tiong Chang, Meng Fan |
關鍵字: | Artificial intelligence (AI) | charge sharing | computing-in-memory (CIM) | inference | static random access memory (SRAM) | 公開日期: | 1-三月-2023 | 卷: | 58 | 期: | 3 | 來源出版物: | IEEE Journal of Solid-State Circuits | 摘要: | Advances in static random access memory (SRAM)-CIM devices are meant to increase capacity while improving energy efficiency (EF) and reducing computing latency (TAC). This work presents a novel SRAM-CIM structure using: 1) a segmented-bitline charge-sharing (SBCS) scheme for multiply-and-accumulate (MAC) operations with low energy consumption and a consistently high signal margin across MAC values; 2) a bitline-combining (BL-CMB) scheme to reduce the number of analog-to-digital converters (ADCs) and, thereby, provide options in determining a tradeoff between EF and inference accuracy; 3) a source-injection local-multiplication cell (SILMC) connected to two types of global-bitline-switch to support the SBCS and BL-CMB schemes with consistent signal margin against process variation in transistors; and 4) prioritized-hybrid ADC to suppress area and power overhead for analog readout operations. We fabricated a 28-nm 384-kb SRAM-CIM macro using foundry-provided compact-6T cells supporting MAC operations with 16 accumulations of 8-b input and 8-b weight with near-full precision output (20 b). This macro achieved TAC of 7.2 ns and EF of 22.75 TOPS/W performing 8-b-MAC operations. |
URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/637306 | ISSN: | 00189200 | DOI: | 10.1109/JSSC.2022.3199077 |
顯示於: | 電機工程學系 |
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