https://scholars.lib.ntu.edu.tw/handle/123456789/640833
標題: | Robust Recovery Scheme for MFIS-FeFETs at Optimal Timing with Prolonged Endurance: Fast-Unipolar Pulsing (100 ns), Nearly Zero Memory Window Loss (0.02 %), and Self-Tracking Circuit Design | 作者: | Wu, C. H. Liu, J. Zheng, X. T. Tseng, Y. M. Kobayashi, M. VITA PI-HO HU Su, C. J. |
公開日期: | 1-一月-2023 | 來源出版物: | Technical Digest - International Electron Devices Meeting, IEDM | 摘要: | This work systematically demonstrates a novel recovery scheme for MFIS-FeFET memory arrays involving device fabrication and circuit integration. For the first time, the timing to initiate recovery to prolong the endurance of FeFETs is studied. A 100-ns fast-unipolar pulsing (FUP) recovery treatment at optimized timing is demonstrated with significantly extending endurance cycles by a factor of 102, together with a nearly zero loss (0.02 %) in memory window (MW) per recovery period and a low MW fluctuation. An ultra-low recovery-induced time loss ratio of 5×10-5 % is achieved. Based on the developed scheme, we propose a self-tracking recovery circuit design utilizing current-mode memory sensing to monitor the degree of fatigue and automatically trigger the recovery operation. |
URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/640833 | ISBN: | 9798350327670 | ISSN: | 01631918 | DOI: | 10.1109/IEDM45741.2023.10413819 |
顯示於: | 電機工程學系 |
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