公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2023 | A 0.0072-mm<sup>2</sup>10-bit 100-MS/s Calibration-free SAR ADC Using Digital Place-and-Route Tools in 40-nm CMOS | Tsai, Yao Hung; SHEN-IUAN LIU | 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings | 0 | 0 | |
2017 | A 0.035-pJ/bit/dB 20-Gb/s Adaptive Linear Equalizer with an Adaptation Time of 2.68 μs | Chen, K.-Y.; Chen, W.-Y.; SHEN-IUAN LIU | IEEE Transactions on Circuits and Systems II: Express Briefs | 8 | 8 | |
2017 | A 0.06mm2 ±50mV Range -82dB THD Chopper VCO-based Sensor Readout Circuit in 40nm CMOS | C.-C. Tu; Y.-K. Wang; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE Symposium on VLSI Circuits | 16 | 0 | |
2017 | A 0.31-pJ/bit 20-Gb/s DFE with 1 Discrete Tap and 2 IIR Filters Feedback in 40-nm-LP CMOS | Chen, K.-Y.; Chen, W.-Y.; SHEN-IUAN LIU | IEEE Transactions on Circuits and Systems II: Express Briefs | 15 | 15 | |
2015 | A 0.3V 10bit 7.3fJ/conversion-step SAR ADC in 0.18μm CMOS | Hsieh, C.-E.; Liu, S.-I.; SHEN-IUAN LIU | Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014 | 16 | 0 | |
2015 | A 0.43pJ/bit true random number generator | Kuan, T.-K.; Chiang, Y.-H.; Liu, S.-I.; SHEN-IUAN LIU | Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014 | 22 | 0 | |
2018 | A 0.5-V 400-MHz Transceiver Using Injection-Locked Techniques in 180-nm CMOS | C.-R. Lee; T.-W. Wang; Y.-L. Tsai; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE ICSICT | 0 | 0 | |
2009 | 0.5-V 5.6-GHz CMOS receiver subsystem | Chen, H.-C.; Wang, T.; Chiu, H.-W.; Kao, T.-H.; Lu, S.-S.; SHEY-SHI LU | IEEE Transactions on Microwave Theory and Techniques | | | |
2016 | A 0.5-V Sub-mW Energy-Efficient Receiver in 0.18-um CMOS for IoT Applications | T.-W. Wang; Y.-L. Tsai; C.-R. Lee; F.-L. Hung; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE ISOCC | 0 | 0 | |
2020 | A 0.5-V, 1.79-μW, 250-kbps Wake-up Receiver for IoT application in 90-nm CMOS | Zhang Z.-C; Chiu C.-Y; Yuan H.-C; TSUNG-HSIEN LIN | 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020 | 3 | 0 | |
2017 | A 0.6-V 200-kbps 429-MHz Ultra-low-power FSK Transceiver in 90-nm CMOS | C.-Y. Chiu; Z.-C. Zhang; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE A-SSCC | 1 | 0 | |
2002 | A 0.8 V switched-opamp bandpass /spl Delta//spl Sigma/ modulator using a two-path architecture | Chang, Hsiang-Hui; Chen, Shang-Ping; Cheng, Kuang-Wei; Liu, Shen-Iuan | 2002 IEEE Asia-Pacific Conference on ASIC | 2 | 0 | |
2005 | 1+ ε approximation clock rate assignment for periodic real-time tasks on a voltage-scaling processor | Chen, Jian-Jia; Kuo, Tei-Wei ; CHI-SHENG SHIH ; TEI-WEI KUO | 5th ACM international conference on Embedded software-EMSOFT 05 EMSOFT 05 | 36 | 0 | |
2005 | 1+epsilon Approximation Clock Rate Assignment for Periodic Real-Time Tasks on A Voltage-Scaling Processor | Chen, Jian-Jia; Kuo, Tei-Wei ; Shih, Chi-Sheng | ACM Conference on Embedded Software | | | |
2005 | (1+ε) Approximation clock rate assignment for periodic real-time tasks on a voltage-scaling processor | Chen, J.-J.; Kuo, T.-W.; Shih, C.-S.; TEI-WEI KUO | 5th ACM International Conference on Embedded Software, EMSOFT 2005 | | | |
2020 | A 1-200MHz Multiple Output Fractional Divider Using Phase Rotating Technique | Lin, C.-Y.; Wang, T.-J.; Hung, Y.-T.; TSUNG-HSIEN LIN | 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020 | 0 | 0 | |
2017 | A 1-V 5-MHz Bandwidth 68.3-dB SNDR Continuous-Time Delta-Sigma Modulator with a Feedback-Assisted Quantizer | C.-H. Weng; Y.-Y. Lin; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢 | IEEE Transactions on Circuits and Systems I | 8 | 8 | |
2007 | A 1.2-V 37-38.5-GHz eight-phase clock generator in 0.13-μm CMOS technology | Cho, L.-C.; Lee, C.; Liu, S.-I.; SHEN-IUAN LIU | IEEE Journal of Solid-State Circuits | 39 | 31 | |
2020 | A 1.22 mW 2.4 GHz PLL Using a Single-Ring-Oscillator-Based Integrator with Background Frequency Calibration | Su G.-Y; Liu S.-I.; SHEN-IUAN LIU | IEEE Transactions on Circuits and Systems I: Regular Papers | 4 | 3 | |
2010 | 1.4μW/channel 16-channel EEG/ECoG Processor for Smart Brain Sensor SoC | T.-C. Chen; T.-H. Lee; Y.-H. Chen; T.-C. Ma; T.-D. Chuang; C.-J. Chou; C.-H. Yang; T.-H. Lin; L.-G. Chen; LIANG-GEE CHEN ; TSUNG-HSIEN LIN | IEEE Symposium on VLSI Circuits | 14 | 0 | |