https://scholars.lib.ntu.edu.tw/handle/123456789/497998
Title: | A design flow for multiplierless linear-phase FIR filters: from system specification to Verilog code. | Authors: | Jheng, Kai-Yuan Jou, Shyh-Jye AN-YEU(ANDY) WU |
Issue Date: | 2004 | Start page/Pages: | 293-296 | Source: | Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004 | URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/497998 |
Appears in Collections: | 電機工程學系 |
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