Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
2010 | A 10b 320MS/s self-calibrated pipeline ADC | Chen, H.-W.; Shen, W.-T.; Cheng, W.-C.; HSIN-SHU CHEN | 2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010 | | | |
2000 | A 14b 20MSample/s CMOS pipelined ADC | Chen, H.-S.; Bacrania, K.; Song, B.-S.; HSIN-SHU CHEN | IEEE International Solid-State Circuits Conference | | | |
2008 | A 2.4 GHz fully integrated cascode-cascade CMOS doherty power amplifier | Yang, L.-Y.; HSIN-SHU CHEN ; YI-JAN EMERY CHEN | IEEE Microwave and Wireless Components Letters | 27 | 20 | |
2012 | A 3.2fJ/c.-s. 0.35V 10b 100KS/s SAR ADC in 90nm CMOS | Tai, H.-Y.; Chen, H.-W.; HSIN-SHU CHEN | IEEE Symposium on VLSI Circuits | | | |
2009 | A 3mW 12b 10MS/s sub-range SAR ADC | Chen, H.-W.; Liu, Y.-H.; Lin, Y.-H.; HSIN-SHU CHEN | 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009 | | | |
2014 | A 6-bit 1-GS/s Two-Step SAR ADC in 40-nm CMOS | Tai, H.-Y.; Tsai, C.-H.; Tsai, P.-Y.; Chen, H.-W; HSIN-SHU CHEN | IEEE Transactions on Circuits and Systems II: Express Briefs | 18 | 18 | |
2006 | A 6-bit 1.6 GS/s flash ADC in 0.18-μm CMOS with reversed-reference dummy | Hung, C.-K.; Shiu, J.-F.; Chen, I.-C.; HSIN-SHU CHEN | 2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 | | | |
2010 | A fast-lock low-power subranging digital delay-locked loop | Chen, H.-S.; Lin, J.-C.; HSIN-SHU CHEN | IEICE Transactions on Electronics | | | |
2012 | A high-efficiency CMOS dc-dc converter with 9-μs transient recovery time | Liu, P.-J.; Ye, W.-S.; Tai, J.-N.; Chen, H.-S.; Chen, J.-H.; YI-JAN EMERY CHEN ; HSIN-SHU CHEN | IEEE Transactions on Circuits and Systems I: Regular Papers | | | |
2012 | A highly integrated class-D amplifier using driver delay hysteresis control | Tai, J.-N.; Chen, H.-S.; Chiu, H.-Q.; HSIN-SHU CHEN | 2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 | | | |
2007 | A self-calibrated multiphase DLL-based clock generator | Chen, H.-S.; Hung, C.-C.; HSIN-SHU CHEN | 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 | | | |
2016 | An 8 b 700 MS/s 1 b/Cycle SAR ADC Using a Delay-Shift Technique | Tsung-Han Tsai; Hung-Yen Tai; Pao-Yang Tsai; Cheng-Hsueh Tsai; Hsin-Shu Chen; HSIN-SHU CHEN | IEEE Transactions on Circuits and Systems I: Regular Papers | 20 | 18 | |
1999 | Characterization of 1/f noise vs. number of gate stripes in MOS transistors | Chen; Hsin-Shu; Ito; Akira; HSIN-SHU CHEN | IEEE International Symposium on Circuits and Systems | | | |
1999 | Characterization of 1/f noise vs. number of gate stripes in MOS transistors. | Chen, Hsin-Shu; Ito, A.; HSIN-SHU CHEN | Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999 | | | |
2008 | Chip-package-board co-design - A DDR3 system design example from circuit designers' perspective | Lin, Y.-H.; Chou, J.; Lu, Y.-C.; Wu, T.-L.; YI-CHANG LU ; HSIN-SHU CHEN ; TZONG-LIN WU | 2008 Electrical Design of Advanced Packaging and Systems Symposium, IEEE EDAPS 2008 | 9 | 0 | |
2017 | A Current Average Control Method for Transient-Glitch Reduction in Variable Frequency DC-DC Converters | Hsin-Shu Chen; Jia-Nan Tai; Yi-Jan Emery Chen; Jau-Horng Chen; HSIN-SHU CHEN | IEEE International Symposium on Circuits & Systems ISCAS | 0 | 0 | |
2017 | A Fast-Transient DC-DC Converter with Hysteresis Prediction Voltage Control | Pang-Jung Liu; Yu-Min Lai; Ping-Chieh Lee; Hsin-Shu Chen; HSIN-SHU CHEN | IET Transactions on Power Electronics | 8 | 8 | |
2019 | A Fast-Transient Switched-Capacitor DC-DC Converter with a Current Sensing Control Technique | Chi-Wei Chen; Hsin-Shu Chen; WEN-JONG WU ; HSIN-SHU CHEN | IEEE MWSCAS | | | |
2019 | A Fast-Transient Switched-Capacitor DC-DC Converter with a Current Sensing Control Technique. | Chen, Chi-Wei; Chen, Hsin-Shu; WEN-JONG WU ; HSIN-SHU CHEN | 62nd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2019, Dallas, TX, USA, August 4-7, 2019 | | | |
2023 | A Highly Multi-Bit Continuous-Time Delta-Sigma Modulator ADC with 9-Bit Feedback | Wu, Jun Yi; HSIN-SHU CHEN | Midwest Symposium on Circuits and Systems | | | |