公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2011 | Thermal modeling and analysis for 3-D ICs with integrated microchannel cooling | Mizunuma, H.; Lu, Y.-C.; Yang, C.-L.; YI-CHANG LU ; CHIA-LIN YANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 46 | 46 | |
2009 | Thermal modeling for 3D-ICs with integrated microchannel cooling | CHIA-LIN YANG ; Mizunuma, H.; Yang, C.-L.; Lu, Y.-C.; CHIA-LIN YANG | IEEE/ACM International Conference on Computer-Aided Design | | | |
2009 | Thermal modeling for 3D-ICs with integrated microchannel cooling. | Mizunuma, Hitoshi; Yang, Chia-Lin; YI-CHANG LU ; CHIA-LIN YANG | 2009 International Conference on Computer-Aided Design, ICCAD 2009, San Jose, CA, USA, November 2-5, 2009 | 45 | 0 | |
2022 | This is SPATEM! A Spatial-Temporal Optimization Framework for Efficient Inference on ReRAM-based CNN Accelerator | Tsou Y.-T; Chent K.-H; CHIA-LIN YANG ; Cheng H.-Y; Chen J.-J; Tsai D.-Y. | Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC | 0 | 0 | |
2004 | Tolerating Memory Latency Through Push Prefetching for Pointer-Intensive Applications | Yang, Chia-Lin ; Lebeck, Alvin R.; Tseng, Hung-Wei; Lee, Chien-Hao | ACM Transactions on Architecture and Code Optimization | 17 | | |
2008 | Tunablevp: a tunable virtual platform for easy soc design space exploration | CHIA-LIN YANG ; Lin, Ye-Jyun; Chen, Yi-Jung; Huang, Chin-Chie; Lin, Tzu-Ching; Chi, Jaw-Wei; CHIA-LIN YANG | 2008 International SoC Design Conference, ISOCC 2008 | | | |
2023 | Unified Agile Accuracy Assessment in Computing-in-Memory Neural Accelerators by Layerwise Dynamical Isometry | Chen, Xuan Jun; Kuan, Cynthia; CHIA-LIN YANG | Proceedings - Design Automation Conference | 0 | 0 | |
2002 | Using intel streaming SIMD extensions for 3D geometry processing | CHIA-LIN YANG ; Ma, W.-C.; CHIA-LIN YANG | Lecture Notes in Computer Science | | | |
2002 | Using Intel Streaming SIMD Extensions for 3D Geometry Processing. | Ma, Wan-Chun; CHIA-LIN YANG | Advances in Multimedia Information Processing - PCM 2002, Third IEEE Pacific Rim Conference on Multimedia, Hsinchu, Taiwan, December 16-18, 2002, Proceedings | | | |
2004 | Value-conscious cache: Simple technique for reducing cache access power | Chang, Y.-J.; Yang, C.-L.; CHIA-LIN YANG ; FEI-PEI LAI | Design, Automation and Test in Europe | 2 | 0 | |
2004 | Workload characterization of the H.264/AVC decoder | CHIA-LIN YANG ; Shih, T.-T.; Yang, C.-L.; Tung, Y.-S.; CHIA-LIN YANG | Lecture Notes in Computer Science | | | |
2004 | Workload Characterization of the H.264/AVC Decoder. | Shih, Tse-Tsung; Yang, Chia-Lin; Tung, Yi-Shin; CHIA-LIN YANG | Advances in Multimedia Information Processing - PCM 2004, 5th Pacific Rim Conference on Multimedia, Tokyo, Japan, November 30 - December 3, 2004, Proceedings, Part II | | | |
2008 | 兆級晶片系統前瞻技術研究-子計畫一:平台式系統晶片之節能記憶體架構(2/3) | 楊佳玲 | | | | |
2008 | 兆級晶片系統前瞻技術研究-子計畫一:平台式系統晶片之節能記憶體架構(3/3) | 楊佳玲 | | | | |
2004 | 先進電子設計自動化技術研發─子計畫一:極大型混合尺寸模組的平面規劃與擺置(1/3) | 楊佳玲 | | | | |
2005 | 先進電子設計自動化技術研發─子計畫一:極大型混合尺寸模組的平面規劃與擺置(2/3) | 楊佳玲 | | | | |
2003 | 多媒體通訊系統中可重組化運算技術之研究─子計劃一:可重組化運算之系統分析與設計(I) | 楊佳玲 | | | | |
2003 | 嵌入系統中低功率快取記憶體結構之設計(1/2) | 楊佳玲 | | | | |
2004 | 嵌入系統中低功率快取記憶體結構之設計(2/2) | 楊佳玲 | | | | |
2008 | 省電與性能最佳化技術:從應用面至系統面之探討-子計畫三:考量能量之網路架構晶片軟硬體共同合成架構 (新制多年期第1年) | 楊佳玲 | | | | |