Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
2009 | 3D technology based circuit and architecture design | YI-CHANG LU | 2009 International Conference on Communications, Circuits and Systems, ICCCAS 2009 | | | |
2021 | 3D-GFE: A Three-Dimensional Geometric-Feature Extractor for Point Cloud Data | Chou Y.-C; Lin Y.-P; Yeh Y.-M; YI-CHANG LU | 2021 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA ASC 2021 - Proceedings | 0 | | |
2008 | A new method to improve accuracy of leakage current estimation for transistors with non-rectangular gates due to sub-wavelength lithography effects | Kuen-Yu Tsai; Meng-Fu You; Yi-Chang Lu; Philip C. W. Ng; YI-CHANG LU ; KUEN-YU TSAI | ICCAD 2008, IEEE/ACM International Conference on Computer-Aided Design | 9 | 0 | |
2010 | A new method to improve accuracy of parasitics extraction considering sub-wavelength lithography effects | Kuen-Yu Tsai; Wei-Jhih Hsieh; Yuan-Ching Lu; Bo-Sen Chang; Sheng-Wei Chien; Yi-Chang Lu; YI-CHANG LU ; KUEN-YU TSAI | ASP-DAC 2010, The 15th Asia and South Pacific Design Automation Conference | 1 | 0 | |
2013 | ABF-based TSV arrays with improved signal integrity on 3-D IC/interposers: equivalent models and experiments | C.-D. Wang; Y.-J. Chang; Y.-C. Lu; P.-S. Chen; W.-C. Lo; Y.-P. Chiou; T.-L. Wu; YI-CHANG LU ; TZONG-LIN WU ; YIH-PENG CHIOU | IEEE Transactions on Components, Packaging and Manufacturing Technology | 24 | 21 | |
2017 | An accurate and fast substrate noise prediction method with octagonal TSV model for 3-D ICs | Y.-A. Hsu; C.-H. Cheng; Y.-C. Lu; T.-L. Wu; YI-CHANG LU | IEEE Transactions on Electromagnetic Compatibility | 5 | 4 | |
2018 | Adaptively banded Smith-Waterman algorithm for long reads and its hardware accelerator | Yi-Lun Liao; Yu-Cheng Li; Nae-Chyun Chen; Yi-Chang Lu; YI-CHANG LU | IEEE International Conference on Application-specific Systems, Architectures and Processors | 17 | 0 | |
2022 | An Alignment-Based Hardware Accelerator for Rapid Prediction of RNA Secondary Structures | Weng, Shih Shiuan; Yeh, Yang Ming; Li, Yu Cheng; YI-CHANG LU | Proceedings - IEEE International Symposium on Circuits and Systems | 0 | 0 | |
2013 | Analysis and implementation of Discrete Wavelet Transform for compressing four-dimensional light field data | Kuo, C.-L.; Lin, Y.-Y.; Lu, Y.-C.; YI-CHANG LU | International System on Chip Conference | 0 | 0 | |
2013 | Architecture and circuit design of parallel processing elements for de novo sequence assembly | Huang, Y.-L.; Liu, C.-S.; Li, Y.-C.; Lu, Y.-C.; YI-CHANG LU | International System on Chip Conference | 0 | 0 | |
2010 | Architecture for next generation massively parallel maskless lithography system (MPML2) | Su, M.-S.; Tsai, K.-Y.; Lu, Y.-C.; Kuo, Y.-H.; Pei, T.-H.; Yen, J.-Y.; YI-CHANG LU ; KUEN-YU TSAI ; JIA-YUSH YEN | Proceedings of SPIE - The International Society for Optical Engineering | | | |
2008 | An asynchronous circuit design with fast forwarding technique at advanced technology node | Tang, C.-K.; Lin, C.-Y.; Lu, Y.-C.; YI-CHANG LU | Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008 | 10 | 0 | |
2021 | Attention EdgeConv for 3D Point Cloud Classification | Lin Y.-P; Yeh Y.-M; Chou Y.-C; YI-CHANG LU | 2021 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA ASC 2021 - Proceedings | 0 | | |
2019 | Banded Pair-HMM Algorithm for DNA Variant Calling and Its Hardware Accelerator Design | Chen, M.-H.; Lin, M.-J.; Li, Y.-C.; Lu, Y.-C.; YI-CHANG LU | Proceedings - 2019 IEEE 19th International Conference on Bioinformatics and Bioengineering, BIBE 2019 | 1 | 0 | |
2019 | BLASTP-ACC: Parallel Architecture and Hardware Accelerator Design for BLAST-based Protein Sequence Alignment | Li, Y.; Lu, Y.; YI-CHANG LU | IEEE Transactions on Biomedical Circuits and Systems | 15 | 13 | |
2007 | A built-in technique for measuring substrate and power supply digital switching noise using PMOS-based differential sensors and a waveform sampler in system-on-chip applications | Iorga, C.; Lu, Yi-Chang ; Dutton, R.W. | IEEE Transactions on Instrumentation and Measurement | | | |
2007 | A built-in technique for measuring substrate and power-supply digital switching noise using PMOS-based differential sensors and a waveform sampler in system-on-chip applications | Iorga, C.; Lu, Y.-C.; Dutton, R.W.; YI-CHANG LU | IEEE Transactions on Instrumentation and Measurement | 8 | 5 | |
2022 | CF-NET: COMPLEMENTARY FUSION NETWORK FOR ROTATION INVARIANT POINT CLOUD COMPLETION | Chen B.-F; Yeh Y.-M; YI-CHANG LU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings | 1 | 0 | |
2008 | Chip-package-board co-design - A DDR3 system design example from circuit designers' perspective | Lin, Y.-H.; Chou, J.; Lu, Y.-C.; Wu, T.-L.; YI-CHANG LU ; HSIN-SHU CHEN ; TZONG-LIN WU | 2008 Electrical Design of Advanced Packaging and Systems Symposium, IEEE EDAPS 2008 | 9 | 0 | |
2019 | Colorization of high-frame-rate monochrome videos using synchronized low-frame-rate color data | Chiang, C.-F.; Yeh, Y.-M.; Yang, C.-Y.; Lu, Y.-C.; YI-CHANG LU | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) | 0 | 0 | |