研究成果

第 1 到 114 筆結果，共 114 筆。

公開日期標題作者來源出版物scopusWOS全文
12024Slack Redistributed Register Clustering with Mixed-Driving Strength Multi-bit Flip-FlopsChen, Yen Yu; Wu, Hao Yu; HUI-RU JIANG ; CHENG-HONG TSAI; Wu, Chien ChengProceedings of the International Symposium on Physical Design
22024Novel Airgap Insertion and Layer Reassignment for Timing Optimization Guided by Slack DependencyTai, Wei Chen; Chung, Min Hsien; HUI-RU JIANG Proceedings of the International Symposium on Physical Design
32024Power Sub-Mesh Construction in Multiple Power Domain Design with IR Drop and Routability OptimizationLu, Chien Pang; HUI-RU JIANG ; Peng, Chung Ching; Mohd Razha, Mohd Mawardi; Uber, AlessandroProceedings of the International Symposium on Physical Design
42024Multi-Corner Timing Macro Modeling With Neural Collaborative Filtering From Recommendation Systems PerspectiveChang, Kevin Kai Chun; Liu, Guan Ting; Chiang, Chun Yao; Lee, Pei Yu; HUI-RU JIANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
52023Lightning Talk: All Routes to Timing ClosureHUI-RU JIANG Proceedings - Design Automation Conference00
62023PV Inverter Control Algorithm Using Reinforcement Learning to Mitigate the Duck Curve ProblemChen, Yu Quan; HUI-RU JIANG ; Kim, Katherine A.Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC00
72022Sub-resolution assist feature generation with reinforcement learning and transfer learningLiu, Guan Ting; Tai, Wei Chen; Lin, Yi Ting; HUI-RU JIANG ; Shiely, James P.; PU-JEN CHENG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD00
82022Timing macro modeling with graph neural networksChang, Kevin Kai Chun; Chiang, Chun Yao; Lee, Pei Yu; HUI-RU JIANG Proceedings - Design Automation Conference30
92022Deadlock Resolution for Intelligent Intersection Management with Changeable TrajectoriesLin, Li Heng; Wang, Kuan Chun; Lee, Ying Hua; Lin, Kai En; CHUNG-WEI LIN ; HUI-RU JIANG IEEE Intelligent Vehicles Symposium, Proceedings00
102022Novel Methodology for SRAF Placement over a Machine Learning Generated Probability MapLin, Yi Ting; Tseng, Sean Shang En; HUI-RU JIANG ; Shiely, James P.Proceedings of SPIE - The International Society for Optical Engineering00
112022Many-Layer Hotspot Detection by Layer-Attentioned Visual Question AnsweringChen Y.-S; HUI-RU JIANG Proceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 202210
122022Clock Design Methodology for Energy and Computation Efficient Bitcoin Mining MachinesLu C.-P; HUI-RU JIANG ; Yang C.-W.Proceedings of the International Symposium on Physical Design00
132022Deadlock Analysis and Prevention for Intersection Management Based on Colored Timed Petri NetsTsou T.-L; CHUNG-WEI LIN ; HUI-RU JIANG Proceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 202200
142021Novel Guiding Template and Mask Assignment for DSA-MP Hybrid Lithography Using Multiple BCP MaterialsLin Y.-T; HUI-RU JIANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems00
152021Efficient Mandatory Lane Changing of Connected and Autonomous VehiclesLin S.-C; Kung C.-C; Lin L; CHUNG-WEI LIN ; HUI-RU JIANG IEEE Vehicular Technology Conference00
162021DATC RDF-2021: Design Flow and BeyondChen J; Jung J; Kahng A.B; Kim S; Kravets V.N; Li Y.-L; Varadarajan R; Woo M.; HUI-RU JIANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD70
172021OpenMPL: An Open-Source Layout DecomposerLi W; Ma Y; Sun Q; Zhang L; Lin Y; Jiang I.H.-R; Yu B; HUI-RU JIANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems54
182021Subresolution Assist Feature Insertion by Variational Adversarial Active Learning and Clustering with Data Point RetrievalTseng S.S.-E; Shiely J.P.; HUI-RU JIANG Proceedings - Design Automation Conference20
192021Opportunities for 2.5/3D Heterogeneous SoC IntegrationCHUNG-PING CHEN ; HUI-RU JIANG ; JIUN-LANG HUANG ; YAO-WEN CHANG 2021 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2021 - Proceedings10
202020Late breaking results: Design dependent mega cell methodology for area and power optimizationLu, C.-P.; Yang, C.-W.; HUI-RU JIANG Proceedings - Design Automation Conference00
212020Fast and accurate wire timing estimation on tree and non-tree net structuresCheng, H.-H.; Ou, O.; HUI-RU JIANG Proceedings - Design Automation Conference130
222020A Dynamic Programming Approach to Optimal Lane Merging of Connected and Autonomous VehiclesLin S.-C; Hsu H; Lin Y.-T; CHUNG-WEI LIN ; Liu C.; HUI-RU JIANG IEEE Intelligent Vehicles Symposium, Proceedings40
232020Intelligent Design Automation for 2.5/3D Heterogeneous SoC IntegrationJiang I.H.-R; Chang Y.-W; Huang J.-L; CHUNG-PING CHEN ; HUI-RU JIANG ; JIUN-LANG HUANG ; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD50
242020Routing topology and time-division multiplexing co-optimization for multi-FPGA systemsLin, T.-W.; Tai, W.-C.; Lin, Y.-C.; HUI-RU JIANG Proceedings - Design Automation Conference40
252020DATC RDF-2020: Strengthening the Foundation for Academic Research in IC Physical DesignChen J; Jiang I.H.-R; Jung J; Kahng A.B; Kravets V.N; Li Y.-L; Lin S.-T; Woo M.; HUI-RU JIANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
262020Dynamic IR-Drop ECO Optimization by Cell Movement with Current Waveform Staggering and Machine Learning GuidanceHuang X.-X; Chen H.-C; Wang S.-W; Jiang I.H.-R; Chou Y.-C; Tsai C.-H.; HUI-RU JIANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
272020Equivalent Capacitance Guided Dummy Fill Insertion for Timing and ManufacturabilityYu, S.-J.; Kao, C.-C.; Huang, C.-H.; HUI-RU JIANG Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC30
282019Efficient search of layout hotspot patterns for matching SEM images using multilevel pixelationSean Shang-En Tseng; Wei-Chun Chang; Iris Hui-Ru Jiang; Jun Zhu; James P. Shiely; HUI-RU JIANG ; 江蕙如SPIE Advanced Lithography Conference (AL-2019)60
292019Graceful register clustering by effective mean shift algorithm for power and timing balancingYa-Chu Chang; Tung-Wei Lin; Iris Hui-Ru Jiang; Gi-Joon Nam; HUI-RU JIANG ; 江蕙如28th ACM International Symposium on Physical Design (ISPD-2019)30
302019Multiple patterning layout compliance with minimizing topology disturbance and polygon displacementHua-Yu Chang; Iris Hui-Ru Jiang; HUI-RU JIANG ; 江蕙如28th ACM International Symposium on Physical Design (ISPD-2019)10
312019Novel guiding template and mask assignment for DSA-MP hybrid lithography using multiple BCP materialsYi-Ting Lin; Iris Hui-Ru Jiang; HUI-RU JIANG ; 江蕙如56th ACM/IEEE Design Automation Conference (DAC-2019)50
322019Openmpl: An open source layout decomposer: Invited paperLi, W.; Ma, Y.; Sun, Q.; Lin, Y.; Jiang, I.H.-R.; Yu, B.; Pan, D.Z.; HUI-RU JIANG Proceedings of International Conference on ASIC
332019DATC RDF-2019: Towards a complete academic reference design flowChen, J.; Jiang, I.H.-R.; Jung, J.; Kahng, A.B.; Kravets, V.N.; Li, Y.-L.; Lin, S.-T.; Woo, M.; HUI-RU JIANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
342019iClaire: A Fast and General Layout Pattern Classification Algorithm with Clip Shifting and Centroid RecreationChang, W.; HUI-RU JIANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
352018iTimerM: A compact and accurate timing macro model for efficient hierarchical timing analysisPei-Yu Lee; Iris Hui-Ru Jiang; HUI-RU JIANG accepted by ACM Transactions on Design Automation of Electronic Systems (ACM TODAES)23
362018COSAT: Congestion, obstacle, and slew Aware tree construction for multiple power domain designChien-Pang Lu; Iris Hui-Ru Jiang; HUI-RU JIANG ; 江蕙如55th ACM/EDAC/IEEE Design Automation Conference (DAC-2018)10
372018Recent research and challenges in multiple patterning layout decompositionJiang, I.H.-R.; Chang, H.-Y.; HUI-RU JIANG Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
382018Timing Macro Modeling for Efficient Hierarchical Timing Analysis.Jiang, Iris Hui-Ru; Lee, Pei-Yu; HUI-RU JIANG 2018 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2018, Hong Kong, China, July 8-11, 2018
392018FastPass: Fast timing path search for generalized timing exception handlingLee, P.-Y.; Jiang, I.H.-R.; Chen, T.-C.; HUI-RU JIANG Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
402018OWARU: Free space-aware timing-driven incremental placement with critical path smoothingJinwook Jung; Gi-Joon Nam; Lakshmi N. Reddy; Iris Hui-Ru Jiang; Youngsoo Shin; HUI-RU JIANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (IEEE TCAD)75
412018DATC RDF: An academic flow from logic synthesis to detailed routingJinwook Jung; Iris Hui-Ru Jiang; Jianli Chen; Shih-Ting Lin; Yih-Lang Li; Victor N. Kravets; Gi-Joon Nam; HUI-RU JIANG ; 江蕙如IEEE/ACM International Conference on Computer Aided Design (ICCAD-2018)110
422017iClaire: A fast and general layout pattern classification algorithmWei-Chun Chang; Iris Hui-Ru Jiang; Yen-Ting Yu; Wei-Fang Liu; HUI-RU JIANG ; 江蕙如54th ACM/EDAC/IEEE Design Automation Conference (DAC-2017)150
432017DRC-based hotspot detection considering edge tolerance and incomplete specificationYen-Ting Yu; Hui-Ru Jiang; Yumin Zhang; Charles C. Chiang; HUI-RU JIANG ; 江蕙如
442017iTimerM: Compact and accurate timing macro modeling for hierarchical timing analysisPei-Yu Lee; Iris Hui-Ru Jiang; Ting-You Yang; HUI-RU JIANG ; 江蕙如26th ACM International Symposium on Physical Design (ISPD-2017)
452017Fast low power rule checking for multiple power domain design.Lu, Chien-Pang; HUI-RU JIANG Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017
462017DATC RDF: Robust design flow database: Invited paperJung, J.; Lee, P.-Y.; Wu, Y.-S.; Darav, N.K.; Jiang, I.H.-R.; Kravets, V.N.; Behjat, L.; Li, Y.-L.; Nam, G.-J.; HUI-RU JIANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
472017iTimerM: Compact and accurate timing macro modeling for efficient hierarchical timing analysisLee, P.-Y.; Jiang, I.H.-R.; Yang, T.-Y.; HUI-RU JIANG Proceedings of the International Symposium on Physical Design
482017Multiple patterning layout decomposition considering complex coloring rules and density balancingIris Hui-Ru Jiang; Hua-Yu Chang; HUI-RU JIANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (IEEE TCAD)129
492017DATC RDF: Robust design flow databaseJinwook Jung; Pe-Yu Lee; Yan-Shiun Wu; Nima Darav; Iris Hui-Ru Jiang; Gi-Joon Nam; Victor N. Kravets; Laleh Behjat; Yih-Lang Li; HUI-RU JIANG ; 江蕙如IEEE/ACM International Conference on Computer Aided Design (ICCAD-2017)
502017Power and area efficient hold time fixing by free metal segment allocationWei-Lun Chiu; Iris Hui-Ru Jiang; Chien-Pang Lu; Yu-Tung Chang; HUI-RU JIANG ; 江蕙如54th ACM/EDAC/IEEE Design Automation Conference (DAC-2017)10
512016Multiple patterning layout decomposition considering complex coloring rulesChang, H.-Y.; HUI-RU JIANG Proceedings - Design Automation Conference
522016Resource-aware functional ECO patch generationCheng, A.-C.; Jiang, I.H.-R.; Jou, J.-Y.; HUI-RU JIANG Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016
532016ITimerC 2.0: Fast incremental timing and CPPR analysisLee, P.-Y.; Jiang, I.H.-R.; Li, C.-R.; Chiu, W.-L.; Yang, Y.-M.; HUI-RU JIANG 2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015
542016OWARU: Free space-aware timing-driven incremental placementJung, J.; Nam, G.-J.; Reddy, L.; Jiang, I.H.-R.; Shin, Y.; HUI-RU JIANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
552016OpenDesign flow database: The infrastructure for VLSI design and design automation researchJung, J.; Jiang, I.H.-R.; Nam, G.-J.; Kravets, V.N.; Behjat, L.; Li, Y.-L.; HUI-RU JIANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
562016Reliability, adaptability and flexibility in timing: Buy a life insurance for your circuitsSchlichtmann, U.; Hashimoto, M.; Jiang, I.H.-R.; Li, B.; HUI-RU JIANG Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
572016GasStation: Power and area efficient buffering for multiple power domain designLu, C.-P.; Jiang, I.H.-R.; Hsu, C.-H.; HUI-RU JIANG 2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015
582016Analytical clustering score with application to post-placement register clusteringChang Xu; Guojie Luo; Peixin Li; Yiyu Shi; Iris Hui-Ru Jiang; HUI-RU JIANG ACM Transactions on Design Automation of Electronic Systems (ACM TODAES)12
592015DRC-based hotspot detection considering edge tolerance and incomplete specificationYu, Y.-T.; Jiang, I.H.-R.; Zhang, Y.; Chiang, C.; HUI-RU JIANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
602015Feature detection for image analytics via FPGA accelerationChang, H.-Y.; Jiang, I.H.-R.; Hofstee, H.P.; Jamsek, D.; Nam, G.-J.; HUI-RU JIANG IBM Journal of Research and Development
612015Smart grid load balancing techniques via simultaneous switch/tie-line/wire configurationsJiang, I.H.-R.; Nam, G.-J.; Chang, H.-Y.; Nassif, S.R.; Hayes, J.; HUI-RU JIANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
622015Machine-learning-based hotspot detection using topological classification and critical feature extractionYu, Y.-T.; Lin, G.-H.; Jiang, I.H.-R.; Chiang, C.; HUI-RU JIANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
632015Analytical Clustering score with application to post-placement multi-bit flip-flop mergingXu, C.; Li, P.; Luo, G.; Shi, Y.; HUI-RU JIANG Proceedings of the International Symposium on Physical Design
642015Criticality-dependency-aware timing characterization and analysisYang, Y.-M.; Tam, K.H.; HUI-RU JIANG Proceedings - Design Automation Conference
652015ITimerC: Common path pessimism removal using effective reduction methodsYang, Y.-M.; Chang, Y.-W.; HUI-RU JIANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
662014Functional ECO using metal-configurable gate-array spare cellsChang, H.-Y.; Jiang, I.H.-R.; YAO-WEN CHANG ; HUI-RU JIANG Design Automation Conference10
672014PushPull: Short-path padding for timing error resilient circuitsYang, Y.-M.; Jiang, I.H.-R.; Ho, S.-T.; HUI-RU JIANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
682014The overview of 2014 CAD contest at ICCAD.Jiang, Iris Hui-Ru; Viswanathan, Natarajan; Chen, Tai-Chen; Li, Jin-Fu; HUI-RU JIANG The IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2014, San Jose, CA, USA, November 3-6, 2014
692014Efficient coverage-driven stimulus generation using simultaneous SAT solving, with application to SystemVerilogCheng, A.-C.; Yen, C.-C.; Val, C.G.; Bayless, S.; Hu, A.J.; Jiang, I.H.-R.; Jou, J.-Y.; HUI-RU JIANG ACM Transactions on Design Automation of Electronic Systems
702013ECO optimization using metal-configurable gate-array spare cellsChang, H.-Y.; Jiang, I.H.-R.; YAO-WEN CHANG ; HUI-RU JIANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems22
712013Machine-learning-based hotspot detection using topological classification and critical feature extractionYu, Y.-T.; Lin, G.-H.; Jiang, I.H.-R.; Chiang, C.; HUI-RU JIANG Proceedings - Design Automation Conference
722013PushPull: Short path padding for timing error resilient circuitsYang, Y.-M.; Jiang, I.H.-R.; Ho, S.-T.; HUI-RU JIANG Proceedings of the International Symposium on Physical Design
732013Pulsed-latch replacement using concurrent time borrowing and clock gatingChang, C.-L.; HUI-RU JIANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
742013FF-bond: Multi-bit flip-flop bonding at placementTsai, C.-C.; Shi, Y.; Luo, G.; HUI-RU JIANG Proceedings of the International Symposium on Physical Design
752013The overview of 2013 CAD contest at ICCAD.Jiang, Iris Hui-Ru; Li, Zhuo; Wang, Hwei-Tseng; Viswanathan, Natarajan; HUI-RU JIANG The IEEE/ACM International Conference on Computer-Aided Design, ICCAD'13, San Jose, CA, USA, November 18-21, 2013
762012WiT: Optimal wiring topology for electromigration avoidanceChang, H.-Y.; Chang, C.-L.; HUI-RU JIANG IEEE Transactions on Very Large Scale Integration (VLSI) Systems2119
772012Timing ECO optimization via B?zier curve smoothing and fixability identificationChang, H.-Y.; Jiang, I.H.-R.; YAO-WEN CHANG ; HUI-RU JIANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems119
782012Timing ECO optimization using metal-configurable gate-array spare cellsChang, H.-Y.; Jiang, I.H.-R.; YAO-WEN CHANG ; HUI-RU JIANG Proceedings - Design Automation Conference40
792012Accurate process-hotspot detection using critical design rule extractionYu, Y.-T.; Chan, Y.-C.; Sinha, S.; Jiang, I.H.-R.; Chiang, C.; HUI-RU JIANG Proceedings - Design Automation Conference
802012INTEGRA: Fast multibit flip-flop clustering for clock power savingJiang, I.H.-R.; Chang, C.-L.; Yang, Y.-M.; HUI-RU JIANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
812012Opening: Introduction to CAD contest at ICCAD 2012: CAD contest.Jiang, Iris Hui-Ru; Li, Zhuo; Li, Yih-Lang; HUI-RU JIANG 2012 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2012, San Jose, CA, USA, November 5-8, 2012
822012Novel pulsed-latch replacement based on time borrowing and spiral clusteringChang, C.-L.; Jiang, I.H.-R.; Yang, Y.-M.; Tsai, E.Y.-W.; Chen, A.S.-H.; HUI-RU JIANG Proceedings of the International Symposium on Physical Design
832012Generic integer linear programming formulation for 3D IC partitioningLee, W.-Y.; Jiang, I.H.-R.; Mei, T.-W.; HUI-RU JIANG Journal of Information Science and Engineering
842012Reliability-driven power/ground routing for analog ICsLin, J.-W.; Ho, T.-Y.; HUI-RU JIANG ACM Transactions on Design Automation of Electronic Systems
852012ECOS: Stable matching based metal-only ECO synthesisJiang, I.H.-R.; Chang, H.-Y.; HUI-RU JIANG IEEE Transactions on Very Large Scale Integration (VLSI) Systems
862011Timing ECO optimization via B?zier curve smoothing and fixability identificationChang, H.-Y.; Jiang, I.H.-R.; YAO-WEN CHANG ; HUI-RU JIANG IEEE/ACM International Conference on Computer-Aided Design20
872011Simultaneous functional and timing ECO.Chang, Hua-Yu; Jiang, Iris Hui-Ru; HUI-RU JIANG ; YAO-WEN CHANG Proceedings of the 48th Design Automation Conference, DAC 2011, San Diego, California, USA, June 5-10, 2011170
882011Recent research development in metal-only ECOTan, C.-Y.; HUI-RU JIANG Midwest Symposium on Circuits and Systems
8920113DICE: 3D IC cost evaluation based on fast tier number estimationChan, C.-C.; Yu, Y.-T.; HUI-RU JIANG Proceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011
902011INTEGRA: Fast multi-bit flip-flop clustering for clock power saving based on interval graphsJiang, I.H.-R.; Chang, C.-L.; Yang, Y.-M.; Tsai, E.Y.-W.; Chen, L.S.-F.; HUI-RU JIANG Proceedings of the International Symposium on Physical Design
912010Optimal wiring topology for electromigration avoidance considering multiple layers and obstaclesJiang, I.H.-R.; Chang, H.-Y.; Chang, C.-L.; HUI-RU JIANG Proceedings of the International Symposium on Physical Design
922010Analog placement and global routing considering wiring symmetryYang, Y.-M.; HUI-RU JIANG Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010
932010Live demo: ECOS 1.0: A metal-only ECO synthesizerJiang, I.H.-R.; Chang, H.-Y.; HUI-RU JIANG ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems
942010Simultaneous voltage island generation and floorplanningLi, H.-Y.; Jiang, I.H.-R.; Chen, H.-M.; HUI-RU JIANG Proceedings - IEEE International SOC Conference, SOCC 2010
952009VIFI-CMP: Variability-tolerant chip-multiprocessors for throughput and powerLee, W.Y.; HUI-RU JIANG Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
962009Generic integer linear programming formulation for 3D IC partitioningHUI-RU JIANG Proceedings - IEEE International SOC Conference, SOCC 2009
972009POSA: Power-state-aware buffered tree constructionJiang, I.H.-R.; Wu, M.-H.; HUI-RU JIANG Proceedings - IEEE International Symposium on Circuits and Systems
982009Matching-based minimum-cost spare cell selection for design changes.Jiang, Iris Hui-Ru; Chang, Hua-Yu; Chang, Liang-Gi; Hung, Huang-Bi; HUI-RU JIANG Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009
992008Configurable rectilinear steiner tree construction for SoC and nano technologiesJiang, I.H.R.; Yu, Y.T.; HUI-RU JIANG 26th IEEE International Conference on Computer Design 2008, ICCD
1002008Topology generation and floorplanning for low power application-specific network-on-chipsLee, W.-Y.; HUI-RU JIANG 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT
1012008Unification of obstacle-avoiding rectilinear steiner tree constructionJiang, I.H.-R.; Lin, S.-W.; Yu, Y.-T.; HUI-RU JIANG 2008 IEEE International SOC Conference, SOCC
1022008Power-state-aware buffered tree constructionJiang, I.H.-R.; Wu, M.-H.; HUI-RU JIANG 26th IEEE International Conference on Computer Design 2008, ICCD
1032007Performance constraints aware voltage Islands generation in SoC floorplan designLu, M.-C.; Wu, M.-C.; Chen, H.-M.; HUI-RU JIANG 2006 IEEE International Systems-on-Chip Conference, SOC
1042006Reliable crosstalk-driven interconnect optimization.Jiang, Iris Hui-Ru; Pan, Song-Ra; Chang, Yao-Wen; HUI-RU JIANG ; YAO-WEN CHANG ACM Trans. Design Autom. Electr. Syst.02
1052004Simultaneous Floorplan and Buffer-Block OptimizationHUI-RU JIANG ; YAO-WEN CHANG ; Jou, Jing-Yang; Chao, Kai-YuanIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems102
1062003Simultaneous floorplanning and buffer block planning.Jiang, Iris Hui-Ru; Chang, Yao-Wen; Jou, Jing-Yang; HUI-RU JIANG ; YAO-WEN CHANG Proceedings of the 2003 Asia and South Pacific Design Automation Conference, ASP-DAC '03, Kitakyushu, Japan, January 21-24, 200300
1072002Formulae for Performance Optimization and Their Applications to Interconnect-Driven Floorplanning.Chang, Nicholas Chia-Yuan; Chang, Yao-Wen; YAO-WEN CHANG ; HUI-RU JIANG 3rd International Symposium on Quality of Electronic Design, ISQED 2002, San Jose, CA, USA, March 18-21, 200210
1082000Optimal reliable crosstalk-driven interconnect optimization.Jiang, Iris Hui-Ru; Pan, Song-Ra; Chang, Yao-Wen; HUI-RU JIANG ; YAO-WEN CHANG Proceedings of the 2000 International Symposium on Physical Design, ISPD 2000, San Diego, CA, USA, April 9-12, 200070
1092000Crosstalk-driven interconnect optimization by simultaneous gate andwire sizing.Jiang, Iris Hui-Ru; Chang, Yao-Wen; YAO-WEN CHANG ; HUI-RU JIANG IEEE Trans. on CAD of Integrated Circuits and Systems4940
1101999Noise-Constrained Performance Optimization by Simultaneous Gate and Wire Sizing Based on Lagrangian Relaxation.Jiang, Iris Hui-Ru; Jou, Jing-Yang; HUI-RU JIANG ; YAO-WEN CHANG Proceedings of the 36th Conference on Design Automation, New Orleans, LA, USA, June 21-25, 1999.90
1111999Optimum loading dispersion for high-speed tree-type decision circuitry.Jiang, Jie-Hong Roland; JIE-HONG JIANG ; HUI-RU JIANG Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999, San Jose, California, USA, November 7-11, 199900
1121999Hierarchical Floorplan Design on the Internet.Lin, Jiann-Horng; Jou, Jing-Yang; HUI-RU JIANG Proceedings of the 1999 Conference on Asia South Pacific Design Automation, Wanchai, Hong Kong, China, January 18-21, 1999
1131999A clustering- and probability-based approach for time-multiplexed FPGA partitioning.Chao, Mango Chia-Tso; Wu, Guang-Ming; Jiang, Iris Hui-Ru; HUI-RU JIANG ; YAO-WEN CHANG Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999, San Jose, California, USA, November 7-11, 199900
1140Please see http://dblp.uni-trier.de/pers/hd/j/Jiang:Iris_Hui=RuIris Hui-Ru Jiang; HUI-RU JIANG ; 江蕙如