第 1 到 403 筆結果,共 403 筆。
公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 | |
---|---|---|---|---|---|---|---|
1 | 2024 | BFP-CIM: Data-Free Quantization with Dynamic Block-Floating-Point Arithmetic for Energy-Efficient Computing-In-Memory-based Accelerator | Chang, Cheng Yang; Huang, Chi Tse; YU-CHUAN CHUANG; Chou, Kuang Chao; AN-YEU(ANDY) WU | Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC | |||
2 | 2023 | Noise-Level Aware Compressed Analysis Framework for Robust Electrocardiography Signal Monitoring | Lo, Yi Cheng; Beh, Win Ken; Huang, Chiao Chun; AN-YEU(ANDY) WU | IEEE Journal of Biomedical and Health Informatics | 1 | 1 | |
3 | 2023 | Machine-aided PPG Signal Quality Assessment (SQA) for Multi-mode Physiological Signal Monitoring | Beh, Win Ken; Yang, Yu Chia; Lo, Yi Cheng; Lee, Yun Chieh; AN-YEU(ANDY) WU | ACM Transactions on Computing for Healthcare | 0 | 0 | |
4 | 2023 | Mitigating Non-ideality Issues of Analog Computing-In-Memory in DNN-based designs | Huang, Chi Tse; AN-YEU(ANDY) WU | Proceedings of International Conference on ASIC | |||
5 | 2022 | An Effective Entropy-Assisted Mind-Wandering Detection System Using EEG Signals of MM-SART Database | Chen, Yi Ta; Lee, Hsing Hao; Shih, Ching Yen; Chen, Zih Ling; Beh, Win Ken; SU-LING YEH ; AN-YEU(ANDY) WU | IEEE Journal of Biomedical and Health Informatics | 7 | 4 | |
6 | 2022 | Low-Complexity Compressive Channel Estimation for IRS-Aided mmWave Systems With Hypernetwork-Assisted LAMP Network | Tsai, Wen Chiao; Chen, Chi Wei; Teng, Chieh Fang; AN-YEU(ANDY) WU | IEEE Communications Letters | 3 | 2 | |
7 | 2022 | Automated Quantization Range Mapping for DAC/ADC Non-linearity in Computing-In-Memory | Huang, Chi Tse; YU-CHUAN CHUANG; Lin, Ming Guang; AN-YEU(ANDY) WU | Proceedings - IEEE International Symposium on Circuits and Systems | 1 | 0 | |
8 | 2022 | C3-SL: Circular Convolution-Based Batch-Wise Compression for Communication-Efficient Split Learning | Hsieh, Cheng Yen; YU-CHUAN CHUANG; AN-YEU(ANDY) WU | IEEE International Workshop on Machine Learning for Signal Processing, MLSP | 1 | 0 | |
9 | 2022 | T-EAP: Trainable Energy-Aware Pruning for NVM-based Computing-in-Memory Architecture | Chang, Cheng Yang; YU-CHUAN CHUANG; Chou, Kuang Chao; AN-YEU(ANDY) WU | Proceeding - IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2022 | 3 | 0 | |
10 | 2022 | Learnable Mixed-precision and Dimension Reduction Co-design for Low-storage Activation | Tai, Yu Shan; Chang, Cheng Yang; Teng, Chieh Fang; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | 0 | 0 | |
11 | 2022 | FACE RECOGNITION FOR FISHEYE IMAGES | Lo, Yi Cheng; Huang, Chiao Chun; Tsai, Yueh Feng; Lo, I. Chan; AN-YEU(ANDY) WU ; HOMER H. CHEN | Proceedings - International Conference on Image Processing, ICIP | 1 | 0 | |
12 | 2022 | D-NAT: Data-Driven Non-Ideality Aware Training Framework for Fabricated Computing-In-Memory Macros | Lin M.-G; Huang C.-T; Chuang Y.-C; Chen Y.-T; Hsu Y.-T; Chen Y.-K; Chou J.-J; TSUNG-TE LIU ; CHI-SHENG SHIH ; AN-YEU(ANDY) WU | IEEE Journal on Emerging and Selected Topics in Circuits and Systems | 2 | 2 | |
13 | 2021 | Coherence between Decomposed Components of Wrist and Finger PPG Signals by Imputing Missing Features and Resolving Ambiguous Features | Tsai, Pei-Yun; Huang, Chiu-Hua; Guo, Jia-Wei; Li, Yu-Chuan; AN-YEU(ANDY) WU ; HUNG-JU LIN ; TZUNG-DAU WANG | Sensors (Basel, Switzerland) | 9 | 6 | |
14 | 2021 | Two-Step Codebook-Assisted Alternating Minimization (CA-AltMin) for Low-Complexity Hybrid Beamforming Design | AN-YEU(ANDY) WU | IEEE Communications Letters | |||
15 | 2021 | Scalable NPairLoss-Based Deep-ECG for ECG Verification | AN-YEU(ANDY) WU | IFIP Advances in Information and Communication Technology | |||
16 | 2021 | Convolutional neural network-aided bit-flipping for Belief propagation decoding of polar codes | AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings | |||
17 | 2021 | Hyperdimensional Computing with Learnable Projection for User Adaptation Framework | AN-YEU(ANDY) WU | IFIP Advances in Information and Communication Technology | |||
18 | 2021 | FL-HDC: Hyperdimensional Computing Design for the Application of Federated Learning | AN-YEU(ANDY) WU | 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems, AICAS 2021 | |||
19 | 2021 | Efficient Mind-wandering Detection System with GSR Signals on MM-SART Database | AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
20 | 2021 | Robust PPG-based Mental Workload Assessment System using Wearable Devices | AN-YEU(ANDY) WU | IEEE Journal of Biomedical and Health Informatics | |||
21 | 2021 | A 7.8-13.6 pJ/b Ultra-Low latency and reconfigurable neural network-assisted polar decoder with multi-code length support | AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems I: Regular Papers | |||
22 | 2021 | A scalable extreme learning machine (S-ELM) for class-incremental ECG-based user identification | AN-YEU(ANDY) WU | Proceedings - IEEE International Symposium on Circuits and Systems | |||
23 | 2021 | MulTa-HDC: A Multi-Task Learning Framework for Hyperdimensional Computing | AN-YEU(ANDY) WU | IEEE Transactions on Computers | |||
24 | 2021 | PQ-HDC: Projection-Based Quantization Scheme for Flexible and Efficient Hyperdimensional Computing | AN-YEU(ANDY) WU | IFIP Advances in Information and Communication Technology | |||
25 | 2021 | When eyes wander around: Mind-wandering as revealed by eye movement analysis with hidden markov models | Lee H.-H; Chen Z.-L; SU-LING YEH ; Hsiao J.H.-W; AN-YEU(ANDY) WU | Sensors | 16 | 13 | |
26 | 2021 | Convolutional Neural Network-Aided Tree-Based Bit-Flipping Framework for Polar Decoder Using Imitation Learning | AN-YEU(ANDY) WU | IEEE Transactions on Signal Processing | |||
27 | 2020 | Weighted pulse decomposition analysis of fingertip photoplethysmogram signals for blood pressure assessment | Chiu-Hua Huang; Yu-Chia Yang; Pei-Yun Tsai; AN-YEU(ANDY) WU ; HUNG-JU LIN ; TZUNG-DAU WANG | Proceedings - IEEE International Symposium on Circuits and Systems | 2 | 0 | |
28 | 2020 | Low-Complexity LSTM-Assisted Bit-Flipping Algorithm for Successive Cancellation List Polar Decoder | AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings | |||
29 | 2020 | Online Extreme Learning Machine Design for the Application of Federated Learning | AN-YEU(ANDY) WU | Proceedings - 2020 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2020 | |||
30 | 2020 | Low-Complexity On-Demand Reconstruction for Compressively Sensed Problematic Signals | AN-YEU(ANDY) WU | IEEE Transactions on Signal Processing | |||
31 | 2020 | A Tri-Mode Compressed Analytics Engine for Low-Power AF Detection With On-Demand EKG Reconstruction | AN-YEU(ANDY) WU | IEEE Journal of Solid-State Circuits | |||
32 | 2020 | Task-projected hyperdimensional computing for multi-task learning | AN-YEU(ANDY) WU | IFIP Advances in Information and Communication Technology | |||
33 | 2020 | ECG-Aided PPG Signal Quality Assessment (SQA) System for Heart Rate Estimation | AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
34 | 2020 | Compressed-domain ECG-based biometric user identification using compressive analysis | AN-YEU(ANDY) WU | Sensors (Switzerland) | |||
35 | 2020 | Low-Complexity Compressed Alignment-Aided Compressive Analysis for Real-Time Electrocardiography Telemonitoring | AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings | |||
36 | 2020 | Accumulated Polar Feature-Based Deep Learning for Efficient and Lightweight Automatic Modulation Classification with Channel Compensation Mechanism | AN-YEU(ANDY) WU | IEEE Transactions on Vehicular Technology | |||
37 | 2020 | A neural network-aided viterbi receiver for joint equalization and decoding | AN-YEU(ANDY) WU | IEEE International Workshop on Machine Learning for Signal Processing, MLSP | |||
38 | 2020 | IP-HDC: Information-Preserved Hyperdimensional Computing for Multi-Task Learning | AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
39 | 2020 | Neural Network-Aided BCJR Algorithm for Joint Symbol Detection and Channel Decoding | AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
40 | 2020 | Dynamic Hyperdimensional Computing for Improving Accuracy-Energy Efficiency Trade-Offs | AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
41 | 2020 | An Ultra-Low Latency 7.8-13.6 pJ/b Reconfigurable Neural Network-Assisted Polar Decoder with Multi-Code Length Support | AN-YEU(ANDY) WU | IEEE Symposium on VLSI Circuits, Digest of Technical Papers | |||
42 | 2020 | Explainable Deep Neural Network for Identifying Cardiac Abnormalities Using Class Activation Map | AN-YEU(ANDY) WU | Computing in Cardiology | |||
43 | 2019 | A 232-1996-kS/s robust compressive sensing reconstruction engine for real-time physiological signals monitoring | Chen, Ting Sheng; HUNG-CHI KUO ; AN-YEU(ANDY) WU | IEEE Journal of Solid-State Circuits | 15 | 15 | |
44 | 2019 | Joint Multi-Beam Training and Codebook Design for Indoor High-throughput Transmissions under Limited Training Steps | Hung-Yi Cheng; Ching-Chun Liao; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Vehicular Technology (TVT) | 0 | 2 | |
45 | 2019 | Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor | Ding-Yuan Lee; Ching-Che Wang; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transaction on Very Large Scale Integration (VLSI) Systems (TVLSI) | 5 | 13 | |
46 | 2019 | AdaBoost-Assisted Extreme Learning Machine for Efficient Online Sequential Classification | AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
47 | 2019 | Neural network-based equalizer by utilizing coding gain in advance | AN-YEU(ANDY) WU | GlobalSIP 2019 - 7th IEEE Global Conference on Signal and Information Processing, Proceedings | |||
48 | 2019 | Entropy-assisted multi-modal emotion recognition framework based on physiological signals | AN-YEU(ANDY) WU | 2018 IEEE EMBS Conference on Biomedical Engineering and Sciences, IECBES 2018 - Proceedings | |||
49 | 2019 | Low-complexity compressed analysis in eigenspace with limited labeled data for real-time electrocardiography telemonitoring | AN-YEU(ANDY) WU | 2018 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2018 - Proceedings | |||
50 | 2019 | Real-Time Multi-User Detection Engine Design for IoT Applications via Modified Sparsity Adaptive Matching Pursuit | Liao, C.-C.; Chen, T.-S.; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems I: Regular Papers | |||
51 | 2019 | Hyperdimensional Computing-based Multimodality Emotion Recognition with Physiological Signals | En-Jui Chang; Abbas Rahimi; Luca Benini; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE International Symposium on AI for Circuits and Systems (AICAS-2019) | |||
52 | 2019 | Sparse Autoencoder with Attention Mechanism for Speech Emotion Recognition. | Sun, Ting-Wei; AN-YEU(ANDY) WU | IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2019, Hsinchu, Taiwan, March 18-20, 2019 | |||
53 | 2019 | Feature Selection Framework for XGBoost Based on Electrodermal Activity in Stress Detection | AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
54 | 2019 | Robust and Lightweight Ensemble Extreme Learning Machine Engine Based on Eigenspace Domain for Compressed Learning | AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems I: Regular Papers | |||
55 | 2019 | Co-Design of Sparse Coding and Dictionary Learning for Real-Time Physiological Signals Monitoring | AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
56 | 2019 | Hyperdimensional Computing-based Multimodality Emotion Recognition with Physiological Signals. | Chang, En-Jui; Rahimi, Abbas; Benini, Luca; AN-YEU(ANDY) WU | IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2019, Hsinchu, Taiwan, March 18-20, 2019 | |||
57 | 2019 | Low-Complexity Compressed-Sensing-Based Watermark Cryptosystem and Circuits Implementation for Wireless Sensor Networks. | Chen, Ting-Sheng; Hou, Kai-Ni; Beh, Win-Ken; AN-YEU(ANDY) WU | IEEE Trans. VLSI Syst. | 16 | 14 | |
58 | 2019 | Scattering Multi-Connectivity Estimation For Indoor Mmwave Small Cells Under Limited Training Steps | Hung-Yi Cheng; Ching-Chun Liao; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Int. Conf. Acoust. Speech, Signal Processing (ICASSP-2019) | 0 | 0 | |
59 | 2019 | Low-Complexity Compressive Analysis in Sub-Eigenspace for ECG Telemonitoring System | Ching-Yao Chou; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Int. Conf. Acoust. Speech, Signal Processing (ICASSP-2018) | 1 | 0 | |
60 | 2019 | Low-Complexity Recurrent Neural Network-Based Polar Decoder With Weight Quantization Mechanism | Chieh-Fang Teng; Chen-Hsi (Derek) Wu; rew Kuan-Shiuan Ho; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Int. Conf. Acoust. Speech, Signal Processing (ICASSP-2018) | 11 | 0 | |
61 | 2019 | Sparse Autoencoder with Attention Mechanism for Speech Emotion Recognition | Ting-Wei Sun; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE International Symposium on AI for Circuits and Systems (AICAS-2019) | |||
62 | 2019 | Entropy and Complexity Assisted EEG-based Mental Workload Assessment System | AN-YEU(ANDY) WU | BioCAS 2019 - Biomedical Circuits and Systems Conference, Proceedings | |||
63 | 2019 | Polar feature based deep architectures for automatic modulation classification considering channel fading | AN-YEU(ANDY) WU | 2018 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2018 - Proceedings | |||
64 | 2018 | Routing Algorithms for Irregular Mesh-Based Network-on-Chip | SHU-YEN LIN ; AN-YEU(ANDY) WU | Multi-Core Embedded Systems | 0 | 0 | |
65 | 2018 | Error-Resilient Reconfigurable Boosting Extreme Learning Machine for ECG Telemonitoring Systems | Sheng-Hui Wang; Huai-Ting Li; An-Yeu Andy Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE International Symposium on Circuits and Systems (ISCAS-2018) | 6 | 0 | |
66 | 2018 | Entropy-Assisted Multi-Modal Emotion Recognition Framework Based on Physiological Signals | Kuan Tung; Po-Kang Liu; Yu-Chuan Chuang; Sheng-Hui Wang; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE EMBS Conference on Biomedical Engineering and Sciences (IECBES’18) | 26 | 0 | |
67 | 2018 | Overview of Efficient Compressive Sensing Reconstruction Engines for E-Health Applications | Ting-Sheng Chen; Kai-Ni Hou; Yo-Woei Pua; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT’18) | 0 | 0 | |
68 | 2018 | A 232-to-1996KS/s Robust Compressive-Sensing Reconstruction Engine for Real-Time Physiological Signals Monitoring | Ting-Sheng Chen; Hung-Chi Kuo; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE International Solid-State Circuits Conference (ISSCC) | 9 | 0 | |
69 | 2018 | Structured Random Compressed Channel Sensing for Millimeter-Wave Large-Scale Antenna Systems | Cheng-Rung Tsai; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Signal Processing | 17 | 16 | |
70 | 2018 | Dynamically Updatable Ternary Segmented Aging Bloom Filter for OpenFlow-Compliant Low-Power Packet Processing | Sheng-Chun Kao; Ding-Yuan Lee; Ting-Sheng Chen; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE/ACM Transactions on Networking | 13 | 10 | |
71 | 2018 | Low-Complexity Compressed Analysis in Eigenspace with Limited Labeled Data for Real-Time Electrocardiography Telemonitoring | Kai-Chieh Hsu; Bo-Hong Cho; Ching-Yao Chou; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Global Conference on Signal and Information Processing (GlobalSIP’18) | 3 | 0 | |
72 | 2018 | Efficient Compressive Channel Estimation for Millimeter-Wave Large-Scale Antenna Systems | Cheng-Rung Tsai; Yu-Hsin Liu; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Signal Processing (TSP) | 64 | 56 | |
73 | 2018 | Low-Complexity Secure Watermark Encryption for Compressed Sensing-Based Privacy Preserving | Kai-Ni Hou; Ting-Sheng Chen; Hung-Chi Kuo; Tzu-Hsuan Chen; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Int. Conf. Acoust. Speech, Signal Processing (ICASSP-2018) | 1 | 0 | |
74 | 2018 | Polar Feature based Deep Architecture for Automatic Modulation Classification Considering Channel Fading | Chieh-Fang Teng; Ching-Chun Liao; Chun-Hsiang Chen; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Global Conference on Signal and Information Processing (GlobalSIP’18) | 17 | 0 | |
75 | 2018 | Entropy-Assisted Emotion Recognition of Valence and Arousal Using XGBoost Classifier | Sheng-Hui Wang; Huai-Ting Li; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | 14th International Conference on Artificial Intelligence Applications and Innovations (AIAI’18) | 27 | 0 | |
76 | 2018 | Low-Complexity Privacy-Preserving Compressive Analysis Using Subspace-Based Dictionary for ECG Telemonitoring System | Ching-Yao Chou; En-Jui Chang; Huai-Ting Li; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Biomedical Circuits and Systems (TBioCAS) | 32 | 27 | |
77 | 2018 | Impact of Supratentorial Cerebral Hemorrhage on the Complexity of Heart Rate Variability in Acute Stroke | CHIH-HAO CHEN ; SUNG-CHUN TANG ; Ding-Yuan Lee; Jiann-Shing Shieh; DAR-MING LAI ; An-Yeu Wu; JIANN-SHING JENG ; AN-YEU(ANDY) WU | Scientific Reports | 19 | 16 | |
78 | 2017 | Reliable Compressive Sensing (CS)-based Multi-User Detection with Power-based Zadoff-Chu Sequence Design | Chieh-Fang Teng; Ching-Chun Liao; Hung-Yi Cheng; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Workshop on Signal Processing Systems (SiPS-2017) | 4 | 0 | |
79 | 2017 | Profiling and SW/HW Co-design for Efficient SDN/OpenFlow Data Plane Realization | Ching-Che Wang; Yi-Ta Chen; Ding-Yuan Lee; Sheng-Chun Kao; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE International Conference on Electronics Information and Emergency Communication (ICEIEC) | 0 | 0 | |
80 | 2017 | Thermal/Traffic Mutual-Coupling Co-simulation Platform for 3D Network-on-Chip (NoC) Designs | An-Yeu (Andy) Wu; Kun-Chih (Jimmy) Chen; Chih-Hao Chao; AN-YEU(ANDY) WU ; 吳安宇 | International Workshop on Network on Chip Architectures (NoCArc'17) | 0 | 0 | |
81 | 2017 | Variation-Aware Reliable Many-Core System Design by Exploiting Inherent Core Redundancy | Huai-Ting Li; Ching-Yao Chou; Yuan-Ting Hsieh; Wei-Ching Chu; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Trans. Very Large Scale Integration (VLSI) Systems (TVLSI) | 8 | 8 | |
82 | 2017 | Compressive Sensing Based ECG Monitoring With Effective AF Detection | Hung-Chi Kuo; Yu-Min Lin; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Int. Conf. Acoust. Speech, Signal Processing (ICASSP-2017) | 6 | 0 | |
83 | 2017 | Compressive Sensing (CS) Assisted Low-Complexity Beamspace Hybrid Precoding for Millimeter-Wave MIMO Systems | Chiang-Hen Chen; Cheng-Rung Tsai; Yu-Hsin Liu; Wei-Lun Hung; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Signal Processing | 53 | 43 | |
84 | 2017 | Path-Diversity-Aware Fault-Tolerant Routing Algorithm for Network-on-Chip Systems | Yu-Yin Chen; En-Jui Chang; Hsien-Kai Hsin; Kun-Chih Chen; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Parallel and Distributed Systems (TPDS) | 54 | 40 | |
85 | 2017 | Identification of Atrial Fibrillation by Quantitative Analyses of Fingertip Photoplethysmogram | SUNG-CHUN TANG ; Pei-Wen Huang; CHI-SHENG HUNG ; Shih-Ming Shan; YEN-HUNG LIN ; Jiann-Shing Shieh; DAR-MING LAI ; An-Yeu Wu; JIANN-SHING JENG ; AN-YEU(ANDY) WU | Scientific Reports | 50 | 42 | |
86 | 2017 | Robust Compressed Analysis Using Subspace-based Dictionary for ECG Telemonitoring Systems | Meng-Ya Tsai; Ching-Yao Chou; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Workshop on Signal Processing Systems (SiPS-2017) | 7 | 0 | |
87 | 2017 | Low-Complexity Stochastic Gradient Pursuit (SGP) Algorithm and Architecture for Robust Compressive Sensing Reconstruction | Yu-Min Lin; Yi Chen; Nai-Shan Huang; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Signal Processing | 22 | 22 | |
88 | 2017 | Overview of High-Efficiency Ant Colony Optimization (ACO)-based Adaptive Routings for Traffic Balancing in Network-on-Chip Systems | En-Jui Chang; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE 12th International Conference on ASIC (ASICON-2017) | 4 | 0 | |
89 | 2017 | Joint Spatially Sparse Channel Estimation for Millimeter-wave Cellular Systems | Cheng-Rung Tsai; Chiang-Hen Chen; Yu-Hsin Liu; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Global Conference on Signal and Information Processing | 1 | 0 | |
90 | 2017 | Low-Latency Voltage-Racing Winner-Take-All (VR-WTA) Circuit for Acceleration of Learning Engine | Chia-Heng Wu; Ting-Sheng Chen; Ding-Yuan Lee; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | Int. Symp. VLSI Design, Automation, and Test | 2 | 0 | |
91 | 2017 | 基於個人化基底的壓縮感知系統及其方法 | An-Yeu Wu; Yu-Min Lin; Hung-Chi Kuo; Yi Chen; AN-YEU(ANDY) WU ; 吳安宇 | ||||
92 | 2017 | Progressive Channel Estimation for Ultra-Low Latency Millimeter-wave Communications | Hung-Yi Cheng; Ching-Chun Liao; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Global Conference on Signal and Information Processing | 4 | 0 | |
93 | 2016 | Robust LMS-based compressive sensing reconstruction algorithm for noisy wireless sensor networks | Lin, Y.-M.; Kuo, H.-C. ; AN-YEU(ANDY) WU | 2nd International Conference on Intelligent Green Building and Smart Grid | 1 | 0 | |
94 | 2016 | Filter-based dual-voltage architecture for low-power long-word TCAM design | Chen, T.-S.; Lee, D.-Y.; Liu, T.-T.; AN-YEU(ANDY) WU ; TSUNG-TE LIU | Proceedings of the 2nd International Conference on Intelligent Green Building and Smart Grid, IGBSG 2016 | 4 | 0 | |
95 | 2016 | Unified low-complexity decision feedback equalizer with adjustable double radius constraint | Cheng, H.-Y.; AN-YEU(ANDY) WU | Digital Signal Processing | 1 | 1 | |
96 | 2016 | Reliable PPG-based Algorithm in Atrial Fibrillation Detection | Shih-Ming Shan; Sung-Chun Tang; Pei-Wen Huang; Yu-Min Lin,Wei-Han Huang; Dar-Ming Lai; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE BioMedical Circuits and Systems Conference | 8 | 0 | |
97 | 2016 | Joint RF/Baseband Grouping-based Codebook Design for Hybrid Beamforming in mmWave MIMO Systems | Chien-Sheng Wu; Chiang-Hen Chen; Cheng-Rung Tsai; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Conference on Signal Processing, Communications and Computing (ICSPCC2016) | 2 | 0 | |
98 | 2016 | Structural Scrambling of Circulant Matrices for Cost-effective Compressive Sensing | Yu-Min Lin; Jie-Fang Zhang; Jing Geng; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | Journal of Signal Processing Systems | 3 | 3 | |
99 | 2016 | Multilevel-DFT based Low-Complexity Hybrid Precoding for Millimeter Wave MIMO Systems | Yu-Hsin Liu; Chiang-Hen Chen; Cheng-Rung Tsai; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Conference on Signal Processing, Communications and Computing (ICSPCC2016) | 3 | 0 | |
100 | 2016 | Multi-channel sensing system and operating method thereof | Cheng-Rung Tsai; An-Yeu Wu; Shih-Lun Huang; Chih Yuan; Hsu-Ming Chuang; AN-YEU(ANDY) WU ; 吳安宇 | ||||
101 | 2016 | Dynamic Reconfigurable Ternary Content Addressable Memory for OpenFlow-Compliant Low-Power Packet Processing | Ting-Sheng Chen; Ding-Yuan Lee; Tsung-Te Liu; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Circuits and Systems-I: Regular Papers (TCAS-I) | 26 | 20 | |
102 | 2016 | Sniper-TEVR: Core-variation simulation platform with register-level fault injection for robust computing in CMP system | Chou, C.-Y.; Ho, Y.-C.; Li, H.-T.; AN-YEU(ANDY) WU | International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016 | |||
103 | 2016 | 具低延遲性的經驗模態分解法之信號分解系統及其方法 | An-Yeu Wu; Wen-Chung Shen; Hsiao-I Jen; AN-YEU(ANDY) WU ; 吳安宇 | ||||
104 | 2016 | 溫度預測系統及其方法 | Kun Chih Chen; An-Yeu Wu; Huai-Ting Li; AN-YEU(ANDY) WU ; 吳安宇 | ||||
105 | 2015 | Thermal-Aware 3D Network-On-Chip (3D NoC) Designs: Routing Algorithms and Thermal Managementse | AN-YEU(ANDY) WU ; AN-YEU(ANDY) WU | ||||
106 | 2015 | "Low Memory-Cost Scramble Methods for Constructing Deterministic CS Matrixs | AN-YEU(ANDY) WU ; AN-YEU(ANDY) WU | ||||
107 | 2015 | http://access.ee.ntu.edu.tw/Publications/Conference/CA136_2015.pdf | AN-YEU(ANDY) WU ; AN-YEU(ANDY) WU | ||||
108 | 2015 | Message from technical program chairs | Takagi, S.; Lian, Y.; AN-YEU(ANDY) WU ; Morie, T. | IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS | 0 | 0 | |
109 | 2015 | Thermal-Aware 3D Network-On-Chip (3D NoC) Designs: Routing Algorithms and Thermal Managementse | Kun-Chih (Jimmy) Chen; Chih-Hao Chao; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU | IEEE Circuits and Systems Magazine | 40 | 30 | |
110 | 2015 | Method and apparatus for performing channel shortening equalization with frequency notch mitigation | Yen-Liang Chen; Shao-Wei Feng; Cheng-Zhou Zhan; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | ||||
111 | 2015 | Regional ACO-Based Cascaded Adaptive Routing for Traffic Balancing in Mesh-Based Network-on-Chip Systems | Chang, En-Jui; Hsin, Hsien-Kai; Chao, Chih-Hao; Lin, Shu-Yen; Wu, An-Yeu; AN-YEU(ANDY) WU ; SHU-YEN LIN | Ieee Transactions on Computers | 28 | 26 | |
112 | 2015 | Complexity of heart rate variability predicts outcome in intensive care unit admitted patients with acute stroke | SUNG-CHUN TANG ; Hsiao-I Jen; YEN-HUNG LIN ; CHI-SHENG HUNG ; Wei-Jung Jou; Pei-Wen Huang; Jiann-Shing Shieh; YI-LWUN HO ; DAR-MING LAI ; An-Yeu Wu; JIANN-SHING JENG ; MING-FONG CHEN ; AN-YEU(ANDY) WU | Journal of Neurology, Neurosurgery and Psychiatry | 78 | 69 | |
113 | 2015 | Ant Colony Optimization-Based Adaptive Network-on-Chip Routing Framework Using Network Information Region | AN-YEU(ANDY) WU ; Hsin, H.-K.; Chang, E.-J.; Su, K.-Y.; AN-YEU(ANDY) WU | IEEE Transactions on Computers | |||
114 | 2015 | Byte-reconfigurable LDPC codec design with application to high-performance ECC of NAND flash memory systems | AN-YEU(ANDY) WU ; Lin, Y.-M.; Li, H.-T.; Chung, M.-H.; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems I: Regular Papers | |||
115 | 2015 | A 1.96 mm 2 low-latency multi-mode crypto-coprocessor for PKC-based IoT security protocols | CR Tsai; MC Hsiao; WC Shen; AYA Wu; CHEN-MOU CHENG ; AN-YEU(ANDY) WU | 2015 IEEE International Symposium on Circuits and Systems (ISCAS) | |||
116 | 2015 | Compressive sensing based ECG telemonitoring with personalized dictionary basis | Yu-Min Lin; Yi Chen; Hung-Chi Kuo; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Biomedical Circuits and Systems Conference (BioCAS-2015) | 7 | 0 | |
117 | 2015 | RC-based Temperature Prediction Scheme for Proactive Dynamic Thermal Management in Throttle-based 3D NoCs | Kun-Chih Chen; En-Jui Chang; Huai-Ting Li; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Parallel and Distributed Systems(TDPS) | 37 | 32 | |
118 | 2015 | Variation-aware core-level redundancy scheme for reliable DSP computation in multi-core systems | AN-YEU(ANDY) WU ; Chu, W.-C.; Li, H.-T.; Chou, C.-Y.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
119 | 2015 | Dynamic group allocation reconstruction for group sparse signals | AN-YEU(ANDY) WU ; Tu, Y.-M.; Chang, M.C.; Lin, Y.-M.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
120 | 2015 | Byte-Reconfigurable LDPC Codec Design with Application to High-Performance ECC of NAND Flash Memory Systems | Yu-Min Lin; Huai-Ting Li; Ming-Han Chung; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Circuits and Systems I: Regular Papers | 19 | 17 | |
121 | 2015 | Ant Colony Optimization-based Adaptive Network-on-Chip Routing Framework Using Network Information Region | Hsien-Kai Hsin; En-Jui Chang; Kuan-Yu Su; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Computers(TC) | 14 | 14 | |
122 | 2015 | Compressive sensing based ECG telemonitoring with personalized dictionary basis | Lin, Y.-M.; Chen, Y.; Kuo, H.-C.; AN-YEU(ANDY) WU ; HUNG-CHI KUO | IEEE Biomedical Circuits and Systems Conference (BioCAS-2015) | 8 | 0 | |
123 | 2015 | Predicting stroke outcomes based on multi-modal analysis of physiological signals | Huang, Pei-Wen; SUNG-CHUN TANG ; Lin, Yu-Min; Liu, You-Cheng; Jou, Wei-Jung; Jen, Hsiao-I; DAR-MING LAI ; AN-YEU(ANDY) WU | International Conference on Digital Signal Processing, DSP | 0 | 0 | |
124 | 2015 | An algorithmic error-resilient scheme for robust LDPC decoding | AN-YEU(ANDY) WU ; Li, H.-T.; Lee, D.-Y.; Chen, K.-C.; AN-YEU(ANDY) WU | 2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015 | |||
125 | 2015 | Low memory-cost scramble methods for constructing deterministic CS matrix | AN-YEU(ANDY) WU ; Zhang, J.-F.; Geng, J.; Lin, Y.-M.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
126 | 2015 | Scalable compressive sensing-based multi-user detection scheme for Internet-of-Things applications | AN-YEU(ANDY) WU ; Liu, J.; Cheng, H.-Y.; Liao, C.-C.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
127 | 2015 | High performance adaptive routing for Network-on-Chip systems with express highway mechanism | AN-YEU(ANDY) WU ; Lin, S.-C.; Chang, E.-J.; Chen, Y.-Y.; Hsin, H.-K.; AN-YEU(ANDY) WU | IEEE Asia-Pacific Conference on Circuits and Systems | |||
128 | 2015 | Low-complexity hybrid precoding algorithm based on orthogonal beamforming codebook | AN-YEU(ANDY) WU ; Hung, W.-L.; Chen, C.-H.; Liao, C.-C.; Tsai, C.-R.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
129 | 2015 | Adaptive filter-based reconstruction engine design for compressive sensing | AN-YEU(ANDY) WU ; Huang, N.-S.; Lin, Y.-M.; Chen, Y.; AN-YEU(ANDY) WU | IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS | |||
130 | 2015 | Complexity of Heart Rate Variability Can Predict Stroke-In-Evolution in Acute Ischemic Stroke Patients | CHIH-HAO CHEN ; Huang, Pei-Wen; SUNG-CHUN TANG ; Shieh, Jiann-Shing; DAR-MING LAI ; AN-YEU(ANDY) WU | Scientific Reports | 45 | 39 | |
131 | 2014 | Ant Colony Optimization-Based Fault-Aware Routing in Mesh-based Network-on-Chip Systems | Hsien-Kai Hsin; En-Jui Chang; Chia-An Lin; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) | 21 | 15 | |
132 | 2014 | Trend-extracted MSE based on adaptive aligned EEMD with early termination scheme | Huang, P.-W.; Jou, W.-J.; Lin, Y.-M.; Jen, H.-I.; SUNG-CHUN TANG ; DAR-MING LAI ; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | 0 | 0 | |
133 | 2014 | Low-Complexity Sinusoidal-Assisted EMD (SAEMD) Algorithms for Solving Mode-Mixing Problems in HHT | Wen-Chung Shen; Yu-Hao Chen; AN-YEU(ANDY) WU | Digital Signal Processing(DSP) | 43 | 34 | |
134 | 2014 | Thermal-aware Dynamic Buffer Allocation for Proactive routing algorithm on 3D Network-on-Chip systems | AN-YEU(ANDY) WU ; Lee, Y.-S.; Hsin, H.-K.; Chen, K.-C.; Chang, E.-J.; AN-YEU(ANDY) WU | International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014 | |||
135 | 2014 | Hydra: An energy-efficient programmable cryptographic coprocessor supporting elliptic-curve pairings over fields of large characteristics | CHEN-MOU CHENG ; AN-YEU(ANDY) WU ; Chang, Y.-A.; Hong, W.-C.; Hsiao, M.-C.; Yang, B.-Y.; Wu, A.-Y.; CHEN-MOU CHENG ; AN-YEU(ANDY) WU | Lecture Notes in Computer Science | |||
136 | 2014 | Traffic-and thermal-aware routing algorithms for 3d network-on-chip (3D NoC) systems | AN-YEU(ANDY) WU ; Chen, K.-C.; Chao, C.-H.; Lin, S.-Y.; AN-YEU(ANDY) WU | Routing Algorithms in Networks-on-Chip | |||
137 | 2014 | Spatial-temporal enhancement of ACO-based selection schemes for adaptive routing in network-on-chip systems | AN-YEU(ANDY) WU ; Hsin, H.-K.; Chang, E.-J.; AN-YEU(ANDY) WU | IEEE Transactions on Parallel and Distributed Systems | |||
138 | 2014 | Low-complexity motion-compensated beamforming algorithm and architecture for synthetic transmit aperture in ultrasound imaging | Chen, Y.-H.; Lin, Y.-M.; Ho, K.-Y.; Wu, A.-Y.; PAI-CHI LI ; AN-YEU(ANDY) WU | IEEE Transactions on Signal Processing | |||
139 | 2014 | Spatial-Temporal Enhancement of ACO-based Selection Schemes for Adaptive Routing in Network-on-Chip Systems | Hsien-Kai Hsin; En-Jui Chang; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Parallel and Distributed Systems (TPDS) | 11 | 8 | |
140 | 2014 | High-throughput QC-LDPC decoder with cost-effective early termination scheme for non-volatile memory systems | AN-YEU(ANDY) WU ; Lin, Y.-M.; Chen, Y.-H.; Chung, M.-H.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
141 | 2014 | A stroke severity monitoring system based on quantitative modified multiscale entropy | Jou, W.-J.; Huang, P.-W.; Lin, Y.-M.; SUNG-CHUN TANG ; DAR-MING LAI ; AN-YEU(ANDY) WU | IEEE 2014 Biomedical Circuits and Systems Conference, BioCAS 2014 - Proceedings | 0 | 0 | |
142 | 2014 | Path-Congestion-Aware Adaptive Routing with a Contention Prediction Scheme for Network-on-Chip Systems | En-Jui Chang; Hsien-Kai Hsin; Shu-Yen Lin; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) | 56 | 38 | |
143 | 2014 | RC-based temperature prediction scheme for proactive dynamic thermal management in throttle-based 3D NoCs | AN-YEU(ANDY) WU ; Chen, K.-C.; Chang, E.-J.; Li, H.-T.; AN-YEU(ANDY) WU | IEEE Transactions on Parallel and Distributed Systems | |||
144 | 2014 | LMS-based adaptive temperature prediction scheme for proactive thermal-aware three-dimensional Network-on-Chip systems | AN-YEU(ANDY) WU ; Chen, K.-C.; Li, H.-T.; AN-YEU(ANDY) WU | International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014 | |||
145 | 2014 | Path-Congestion-Aware Adaptive Routing with a Contention Prediction Scheme for Network-on-Chip Systems | Chang, En-Jui; Hsin, Hsien-Kai; Lin, Shu-Yen; AN-YEU(ANDY) WU ; SHU-YEN LIN | Ieee Transactions on Computer-Aided Design of Integrated Circuits and Systems | 56 | 39 | |
146 | 2014 | Robust decision feedback equalizer scheme by using sphere-decoding detector | AN-YEU(ANDY) WU ; Cheng, H.-Y.; Chu, C.-Y.; Cheng, Y.-L.; AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | |||
147 | 2014 | Ant colony optimization-based fault-aware routing in mesh-based network-on-chip systems | AN-YEU(ANDY) WU ; Hsin, H.-K.; Chang, E.-J.; Lin, C.-A.; AN-YEU(ANDY) WU | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | |||
148 | 2013 | ACO-based fault-aware routing algorithm for Network-on-Chip systems | AN-YEU(ANDY) WU ; Lin, C.-A.; Hsin, H.-K.; Chang, E.-J.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
149 | 2013 | Transport-Layer-Assisted Routing for Runtime Thermal Management of 3D NoC Systems | Chao, Chih-Hao; Chen, Kun-Chih; Yin, Tsu-Chu; Lin, Shu-Yen; AN-YEU(ANDY) WU ; SHU-YEN LIN | Acm Transactions on Embedded Computing Systems | 29 | 26 | |
150 | 2013 | Design of thermal management unit with vertical throttling scheme for proactive thermal-aware 3D NoC systems | AN-YEU(ANDY) WU ; Chen, K.-C.; Lin, S.-Y.; AN-YEU(ANDY) WU | 2013 International Symposium on VLSI Design, Automation, and Test | |||
151 | 2013 | Reconfigurable Parallel Turbo Decoder Design for Multiple High-Mobility 4G Systems | Cheng-Hung Lin; Chun-Yu Chen; En-Jui Chang; AN-YEU(ANDY) WU | Journal of Signal Processing Systems (JSPS) | 15 | 12 | |
152 | 2013 | VLSI implementation of real-time motion compensated beamforming in synthetic transmit aperture imaging | AN-YEU(ANDY) WU ; Ho, K.-Y.; Chen, Y.-H.; Zhan, C.-Z.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
153 | 2013 | Motion artifact elimination algorithm with eigen-based clutter filter for color Doppler processing | AN-YEU(ANDY) WU ; Liu, Z.-L.; Chen, Y.-H.; Zhan, C.-Z.; AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | |||
154 | 2013 | Dual-mode low-complexity codebook searching algorithm and VLSI architecture for LTE/LTE-advanced systems | AN-YEU(ANDY) WU ; Lin, Y.-H.; Chen, Y.-H.; Chu, C.-Y.; Zhan, C.-Z.; AN-YEU(ANDY) WU | IEEE Transactions on Signal Processing | |||
155 | 2013 | Accelerating motion-compensated adaptive color Doppler engine on CUDA-based GPU platform | AN-YEU(ANDY) WU ; Lee, I.-H.; Chen, Y.-H.; Huang, N.-S.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
156 | 2013 | Editorial low-power, intelligent, and secure solutions for realization of internet of things | AN-YEU(ANDY) WU ; Chen, Y.-K.; Wu, A.-Y.; Bayoumi, M.A.; Koushanfar, F.; AN-YEU(ANDY) WU | IEEE Journal on Emerging and Selected Topics in Circuits and Systems | |||
157 | 2013 | Routing-Based Traffic Migration and Buffer Allocation Schemes for Three-Dimensional Network-on-Chip Systems with Thermal Limit | Chih-Hao Chao; Kun-Chih Chen; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU | IEEE Transactions on Very Large Scale Integration Systems (TVLSI) | 16 | 11 | |
158 | 2013 | Topology-Aware Adaptive Routing for Nonstationary Irregular Mesh in Throttled 3D NoC Systems | Chen, Kun-Chih; Lin, Shu-Yen; Hung, Hui-Shun; AN-YEU(ANDY) WU ; SHU-YEN LIN | Ieee Transactions on Parallel and Distributed Systems | 60 | 44 | |
159 | 2013 | Proactive Thermal-Budget-Based Beltway Routing algorithm for thermal-aware 3D NoC systems. | Kuo, Che-Chuan; Chen, Kun-Chih; Chang, En-Jui; AN-YEU(ANDY) WU | 2013 International Symposium on System on Chip, ISSoC 2013, Tampere, Finland, October 23-24, 2013 | |||
160 | 2013 | Accelerating motion-compensated adaptive color Doppler engine on CUDA-based GPU platform. | Lee, I-Hsuan; Chen, Yu-Hao; Huang, Nai-Shan; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS 2013, Taipei City, Taiwan, October 16-18, 2013 | |||
161 | 2013 | ACO-based fault-aware routing algorithm for Network-on-Chip systems. | Lin, Chia-An; Hsin, Hsien-Kai; Chang, En-Jui; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS 2013, Taipei City, Taiwan, October 16-18, 2013 | |||
162 | 2013 | New Ping-Pong Scheduling for Low-Latency EMD Engine Design in Hilbert-Huang Transform | Wen-Chung Shen; Hsiao-I Jen; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Circuits and Systems, Part-II: Express Briefs (TCAS-II) | 19 | 12 | |
163 | 2013 | Securing M2M with Post-Quantum Public-Key Cryptography | Jie-Ren Shih; Yongbo Hu; Ming-Chun Hsiao; Ming-Shing Chen; Wen-Chung Shen; Bo-Yin Yang; An-Yeu Wu; Chen-Mou Cheng; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Journal of Emerging and Selected Topics in Circuits and Systems (JETCAS) | 20 | 16 | |
164 | 2013 | Recon?gurable Adaptive Singular Value Decomposition Engine Design for High-Throughput MIMO-OFDM Systems | Yen-Liang Chen; Cheng-Zhou Zhan; Ting-Jyun Jheng; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU | IEEE Transactions on Very Large Scale Integration Systems (TVLSI) | 26 | 24 | |
165 | 2013 | Dual-Mode Low-Complexity Codebook Searching Algorithm and VLSI Architecture for LTE/LTE-Advanced Systems | Yi-Hsuan Lin; Yu-Hao Chen; Chun-Yuan Chu; Cheng-Zhou Zhan; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Signal Processing (TSP) | 11 | 8 | |
166 | 2013 | Hybrid path-diversity-aware adaptive routing with latency prediction model in Network-on-Chip systems | AN-YEU(ANDY) WU ; Tsai, P.-A.; Kuo, Y.-H.; Chang, E.-J.; Hsin, H.-K.; AN-YEU(ANDY) WU | 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013 | |||
167 | 2013 | New ping-pong scheduling for low-latency EMD engine design in Hilbert-Huang transform | AN-YEU(ANDY) WU ; Shen, W.-C.; Jen, H.-I.; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems II: Express Briefs | |||
168 | 2013 | Implementation of ACO-based selection with backward-ant mechanism for adaptive routing in network-on-chip systems | AN-YEU(ANDY) WU ; Hsin, H-K.; Chang, E-J; AN-YEU(ANDY) WU | IEEE Embedded Systems Letters | |||
169 | 2013 | Proactive thermal-budget-based beltway routing algorithm for thermal-aware 3D NoC systems | AN-YEU(ANDY) WU ; Kuo, C.-C.; Chen, K.-C.; Chang, E.-J.; AN-YEU(ANDY) WU | 2013 International Symposium on System-on-Chip, SoC 2013 | |||
170 | 2013 | Cost-effective scalable QC-LDPC decoder designs for non-volatile memory systems | AN-YEU(ANDY) WU ; Chung, M.-H.; Lin, Y.-M.; Zhan, C.-Z.; AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | |||
171 | 2013 | Traffic- and Thermal-aware Adaptive Beltway Routing for three dimensional Network-on-Chip systems | AN-YEU(ANDY) WU ; Chen, K.-C.; Kuo, C.-C.; Hung, H.-S.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
172 | 2013 | Securing M2M with post-quantum public-key cryptography | CHEN-MOU CHENG ; AN-YEU(ANDY) WU ; Shih, J.-R.; Hu, Y.; Hsiao, M.-C.; Chen, M.-S.; Shen, W.-C.; Yang, B.-Y.; Wu, A.-Y.; CHEN-MOU CHENG ; AN-YEU(ANDY) WU | IEEE Journal on Emerging and Selected Topics in Circuits and Systems | 16 | ||
173 | 2012 | Transport-layer assisted vertical traffic balanced routing for thermal-aware three-dimensional Network-on-Chip systems | AN-YEU(ANDY) WU ; Chen, K.-C.; Chih-Hao; Lin, S.-Y.; Hung, H.-S.; AN-YEU(ANDY) WU | International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 | |||
174 | 2012 | A low-complexity grouping FFT-based codebook searching algorithm in LTE system | AN-YEU(ANDY) WU ; Lin, Y.-H.; Zhan, C.-Z.; Chu, C.-Y.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
175 | 2012 | Path-diversity-aware adaptive routing in network-on-chip systems | AN-YEU(ANDY) WU ; Kuo, Y.-H.; Tsai, P.-A.; Ho, H.-P.; Chang, E.-J.; Hsin, H.-K.; AN-YEU(ANDY) WU | IEEE 6th International Symposium on Embedded Multicore SoCs, MCSoC 2012 | |||
176 | 2012 | Networks-on-chip: Architectures, design methodologies, and case studies | AN-YEU(ANDY) WU ; SAO-JIE CHEN ; Chen, S.-J.; Wu, A.-Y.A.; Xu, J.; AN-YEU(ANDY) WU ; SAO-JIE CHEN | Journal of Electrical and Computer Engineering | |||
177 | 2012 | Iterative Superlinear-Convergence SVD Beamforming Algorithm and VLSI Architecture for MIMO-OFDM Systems | Cheng-Zhou Zhan; Yen-Liang Chen; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Signal Processing | 33 | 33 | |
178 | 2012 | Power-Efficient State Exchange Scheme for Low Latency SMU Design of Viterbi Decoder | Chun-Yuan Chu; AN-YEU(ANDY) WU | Journal of Signal Processing Systems (JSPS) | 3 | 1 | |
179 | 2012 | Matrix Merging Scheme and Efficient Decoding Techniques for Reconfigurable QC-LDPC Decoders | Min-An Chao; Xin-Yu Shih; AN-YEU(ANDY) WU | Journal of Signal Processing Systems (JSPS) | 3 | 3 | |
180 | 2012 | Coherent image herding of inhomogeneous motion compensation for synthetic transmit aperture in ultrasound image | AN-YEU(ANDY) WU ; Chen, Y.-H.; Ho, K.-Y.; Zhan, C.-Z.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
181 | 2012 | Motion artifact elimination algorithm and architecture for eigen-based clutter filter in color doppler processing | AN-YEU(ANDY) WU ; Chen, Y.-H.; Liu, Z.-L.; Lee, I.-H.; AN-YEU(ANDY) WU | International Journal of Electrical Engineering | |||
182 | 2012 | Foreword | AN-YEU(ANDY) WU ; Wu, A.-Y.; Wang, L.-C.; AN-YEU(ANDY) WU | 2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 | |||
183 | 2012 | Traffic-balanced topology-aware multiple routing adjustment for throttled 3D NoC systems | AN-YEU(ANDY) WU ; Chen, K.-C.; Lin, S.-Y.; Hung, H.-S.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
184 | 2012 | ACO-based Deadlock-Aware fully-adaptive routing in Network-on-Chip systems | AN-YEU(ANDY) WU ; Su, K.-Y.; Hsin, H.-K.; Chang, E.-J.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
185 | 2012 | Iterative superlinear-convergence SVD beamforming algorithm and VLSI architecture for MIMO-OFDM systems | AN-YEU(ANDY) WU ; Zhan, C.-Z.; Chen, Y.-L.; AN-YEU(ANDY) WU | IEEE Transactions on Signal Processing | |||
186 | 2011 | Area-Efficient Scalable MAP Processor Design for High-Throughput Multistandard Convolutional Turbo Decoding | Chen-Hung Lin; Chun-Yu Chen; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | 45 | 34 | |
187 | 2011 | Area-efficient scalable MAP processor design for high-throughput multistandard convolutional turbo decoding | AN-YEU(ANDY) WU ; Lin, C.-H.; Chen, C.-Y.; AN-YEU(ANDY) WU | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | |||
188 | 2011 | Parallel architecture core (PAC)-the first multicore application processor SoC in Taiwan part II: Application programming | AN-YEU(ANDY) WU ; Chen, J.-M.; Liu, C.-N.; Yang, J.-K.; Tseng, S.-Y.; Shih, W.-K.; AN-YEU(ANDY) WU | Journal of Signal Processing Systems | |||
189 | 2011 | Transport Layer Assisted Routing for Non-Stationary Irregular mesh of thermal-aware 3D Network-on-Chip systems | AN-YEU(ANDY) WU ; Chao, C.-H.; Yin, T.-C.; Lin, S.-Y.; AN-YEU(ANDY) WU | International System on Chip Conference | |||
190 | 2011 | A scalable built-in self-recovery (BISR) VLSI architecture and design methodology for 2D-mesh based on-chip networks | Chen, Kun-Chih; SHU-YEN LIN ; Shen, Wen-Chung; AN-YEU(ANDY) WU | Design Automation for Embedded Systems | 6 | 6 | |
191 | 2011 | A 0.16nJ/bit/iteration 3.38mm 2 turbo decoder chip for WiMAX/LTE standards | AN-YEU(ANDY) WU ; Lin, C.-H.; Chen, C.-Y.; Chang, E.-J.; AN-YEU(ANDY) WU | 2011 International Symposium on Integrated Circuits | |||
192 | 2011 | Traffic-and thermal-aware routing for throttled three-dimensional Network-on-Chip systems | AN-YEU(ANDY) WU ; Lin, S.-Y.; Yin, T.-C.; Wang, H.-Y.; AN-YEU(ANDY) WU | International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011 | |||
193 | 2011 | Multi-Pheromone ACO-based routing in Network-on-Chip system inspired by economic phenomenon | AN-YEU(ANDY) WU ; Hsin, H.-K.; Chang, E.-J.; Chao, C.-H.; Lin, S.-Y.; AN-YEU(ANDY) WU | International System on Chip Conference | |||
194 | 2011 | Multi-prediction particle filter for efficient parallelized implementation | Chun-Yuan Chu; Chih-Hao Chao; Min-An Chao; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | on-line publication in EURASIP Journal on Advances in Signal Processing | 0 | 6 | |
195 | 2011 | Design of transport layer assisted routing for thermal-aware 3D Network-on-Chip | AN-YEU(ANDY) WU ; Yin, T.-C.; Chao, C.-H.; Lin, S.-Y.; AN-YEU(ANDY) WU | APSIPA ASC 2011 - Asia-Pacific Signal and Information Processing Association Annual Summit and Conference 2011 | |||
196 | 2011 | Adaptive thresholding incorporating temporal and spatial information with eigen-based clutter filter for color Doppler processing in ultrasonic systems | AN-YEU(ANDY) WU ; Zhan, C.-Z.; Liu, Z.-L.; AN-YEU(ANDY) WU | 2011 IEEE Workshop on Signal Processing Systems, SiPS 2011 | |||
197 | 2011 | Parallel architecture core (PAC)-the first multicore application processor SoC in Taiwan part I: Hardware architecture & software development tools | AN-YEU(ANDY) WU ; Chang, D.C.-W.; Lin, T.-J.; Wu, C.-J.; Lee, J.-K.; Chu, Y.-H.; AN-YEU(ANDY) WU | Journal of Signal Processing Systems | |||
198 | 2010 | Traffic-thermal mutual-coupling co-simulation platform for three-dimensional network-on-chip | AN-YEU(ANDY) WU ; Jheng, K.-Y.; Chao, C.-H.; Wang, H.-Y.; AN-YEU(ANDY) WU | International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010 | |||
199 | 2010 | Traffic- and thermal-aware run-time thermal management scheme for 3D NoC systems | AN-YEU(ANDY) WU ; Chao, C.-H.; Jheng, K.-Y.; Wang, H.-Y.; Wu, J.-C.; AN-YEU(ANDY) WU | NOCS 2010 - The 4th ACM/IEEE International Symposium on Networks-on-Chip | |||
200 | 2010 | Multi-prediction particle filter for effcient memory utilization | AN-YEU(ANDY) WU ; Chu, C.-Y.; Chao, C.-H.; Chao, M.-A.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
201 | 2010 | A 2.17 mm2 125 mW reconfigurable SVD chip for IEEE 802.11n system | AN-YEU(ANDY) WU ; Chen, Y.-L.; Jheng, T.-J.; Zhan, C.-Z.; AN-YEU(ANDY) WU | ESSCIRC 2010 - 36th European Solid State Circuits Conference | |||
202 | 2010 | Chairs' message | Bhattacharyya, S.; Janneck, J.; Chen, Y.-K.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
203 | 2010 | ACO-based cascaded adaptive routing for traffic balancing in NoC systems | AN-YEU(ANDY) WU ; Chang, E.-J.; Chao, C.-H.; Jheng, K.-Y.; Hsin, H.-K.; AN-YEU(ANDY) WU | 1st International Conference on Green Circuits and Systems | |||
204 | 2010 | Efficient parallelized particle filter design on CUDA | AN-YEU(ANDY) WU ; Chao, M.-A.; Chu, C.-Y.; Chao, C.-H.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
205 | 2010 | Motion-tracking adaptive persistence and adaptive-size median filter for color doppler processing in ultrasound systems on multicore platform | Zhan, C.-Z.; Chang, K.-T.; Chen, Y.-H.; Li, P.-C.; AN-YEU(ANDY) WU ; PAI-CHI LI | 2010 IEEE Biomedical Circuits and Systems Conference, BioCAS 2010 | 2 | 0 | |
206 | 2010 | Generalized Pipelined Tomlinson–Harashima Precoder Design Methodology With Build-In Arbitrary Speed-Up Factors | Yen-Liang Chen; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transaction on Signal Processing | 4 | 4 | |
207 | 2010 | Regional ACO-based routing for load-balancing in NoC systems | AN-YEU(ANDY) WU ; Hsin, H.-K.; Chang, E.-J.; Chao, C.-H.; AN-YEU(ANDY) WU | 2nd World Congress on Nature and Biologically Inspired Computing, NaBIC 2010 | |||
208 | 2010 | Cost-effective constrained particle filter for indoor localization | AN-YEU(ANDY) WU ; Chao, C.-H.; Chu, C.-Y.; Chao, M.-A.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
209 | 2010 | Generalized pipelined Tomlinson - Harashima precoder design methodology with build-in arbitrary speed-up factors | AN-YEU(ANDY) WU ; Chen, Y.-L.; AN-YEU(ANDY) WU | IEEE Transactions on Signal Processing | |||
210 | 2010 | Joint-decision adaptive clutter filter and motion-tracking adaptive persistence for color doppler processing in ultrasonic systems | AN-YEU(ANDY) WU ; Chang, K.-T.; Zhan, C.-Z.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
211 | 2010 | A two-cycle lock-in time ADPLL design based on a frequency estimation algorithm | AN-YEU(ANDY) WU ; Wu, C.-T.; Shen, W.-C.; Wang, W.; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems II: Express Briefs | |||
212 | 2010 | A Two-Cycle Lock-In Time ADPLL Design Based on a Frequency Estimation Algorithm | Chia-Tsun Wu; Wen-Chung Shen; Wei Wang; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Circuits and Systems, Part-II: Express Briefs (SCI, EI) | 48 | 40 | |
213 | 2009 | Fault-tolerant Router with Built-in Self-test/Self-diagnosis and Fault-isolation Circuits for 2D-mesh Based Chip Multiprocessor | Shu-Yen Lin; Wen-Chung Shen; Chan-Cheng Hsu; An-Yeu Wu; AN-YEU(ANDY) WU | International Journal of Electrical Engineering | 21 | 0 | |
214 | 2009 | Welcome message from An-Yeu Wu, conference co-chair | AN-YEU(ANDY) WU | IMPACT Conference 2009 International 3D IC Conference - Proceedings | |||
215 | 2009 | A triple-mode LDPC decoder design for IEEE 802.11n system | AN-YEU(ANDY) WU ; Chao, M.-A.; Wen, J.-Y.; Shih, X.-Y.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
216 | 2009 | A 52-mW 8.29mm2 19-mode LDPC decoder chip for mobile WiMAX applications | AN-YEU(ANDY) WU ; Shih, X.-Y.; Zhan, C.-Z.; Lin, C.-H.; AN-YEU(ANDY) WU | Asia and South Pacific Design Automation Conference, ASP-DAC | |||
217 | 2009 | A real-time programmable LDPC decoder chip for arbitrary QC-LDPC parity check matrices | AN-YEU(ANDY) WU ; Shih, X.-Y.; Zhan, C.-Z.; AN-YEU(ANDY) WU | 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009 | |||
218 | 2009 | Multilevel LINC system designs for power efficiency enhancement of transmitters | Kai-Yuan Jheng; Yuan-Jyue Chen; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Journal of Selected Topics in Signal Processing | 34 | 27 | |
219 | 2009 | High-convergence-speed low-computation-complexity SVD algorithm for MIMO-OFDM systems | AN-YEU(ANDY) WU ; Zhan, C.-Z.; Jheng, K.-Y.; Chen, Y.-L.; Jheng, T.-J.; AN-YEU(ANDY) WU | 2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09 | |||
220 | 2009 | A channel-adaptive early termination strategy for LDPC decoders | AN-YEU(ANDY) WU ; Chen, Y.-H.; Chen, Y.-J.; Shih, X.-Y.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
221 | 2009 | Low-power memory-reduced traceback MAP decoding for double-binary convolutional turbo decoder | AN-YEU(ANDY) WU ; Lin, C.-H.; Chen, C.-Y.; Wu, A.-Y.; Tsai, T.-H.; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems I: Regular Papers | |||
222 | 2009 | Fault-tolerant router with built-in self-test/self-diagnosis and fault-isolation circuits for 2d-mesh based chip multiprocessor systems | Lin, S.-Y.; Shen, W.-C.; Hsu, C.-C.; AN-YEU(ANDY) WU | International Journal of Electrical Engineering | |||
223 | 2009 | Design and Implementation of Cost-Efficient Probabilistic-Based Noise-Tolerant VLSI Circuits | I-Chyn Wey; You-Gang Chen; Chang-Hong Yu; An-Yeu Wu; Jie Chen; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions onCircuits and Systems Part-I: Regular Papers | 29 | 21 | |
224 | 2009 | Multilevel LINC system designs for power efficiency enhancement of transmitters | AN-YEU(ANDY) WU ; Jheng, K.-Y.; Chen, Y.-J.; AN-YEU(ANDY) WU | IEEE Journal on Selected Topics in Signal Processing | |||
225 | 2009 | Fault-tolerant Router with Built-in Self-test/Self-diagnosis and Fault-isolation Circuits for 2D-mesh Based Chip Multiprocessor | Lin, Shu-Yen ; Shen, Wen-Chung; Hsu, Chan-Cheng; Wu, An-Yeu | International Journal of Electrical Engineering | |||
226 | 2009 | Low-Power Memory-Reduced Traceback MAP Decoding for Double-Binary Convolutional Turbo Decoder | Cheng-Hung Lin; Chun-Yu Chen; An-Yeu Wu; Tsung-Han Tsai; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Circuits and Systems Part I: Regular Paper | 41 | 30 | |
227 | 2009 | Adaptive Channel-Shortened Interpolated Echo and NEXT Canceller Designs Applied to 10GBASE-T Ethernet System | Chen, Yen-Liang; Zhan, Cheng-Zhou; Jheng, Ting-Jyun; Wu, An-Yeu | International Journal of Electrical Engineering | |||
228 | 2009 | Design and Implementation of Cost-Effective Probabilistic-Based Noise-Tolerant VLSI Circuits | Wey, I-Chyn; Chen, You-Gang; Yu, Chang-Hong; Wu, An-Yeu ; Chen, Jie | IEEE Transactions on Circuits and Systems I: Regular Papers | |||
229 | 2009 | PAC Duo SoC performance analysis with ESL design methodology | AN-YEU(ANDY) WU ; Chuang, I.-Y.; Chang, C.-W.; Fan, T.-Y.; Yeh, J.-C.; Ji, K.-M.; Ma, J.-L.; Wu, A.-Y.; Lin, S.-Y.; AN-YEU(ANDY) WU | ASICON 2009 - 8th IEEE International Conference on ASIC | |||
230 | 2009 | A scalable built-in self-test/self-diagnosis architecture for 2D-mesh based chip multiprocessor systems | AN-YEU(ANDY) WU ; Lin, S.-Y.; Hsu, C.-C.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
231 | 2008 | 10GBase-T乙太網路系統晶片設計-子計畫五:適用於10GBase-T乙太網路之高效能數位信號處理引擎設計(2/3) | 吳安宇 | ||||
232 | 2008 | 兆級晶片系統前瞻技術研究-子計畫五:兆級晶片系統中晶片內通訊電路及系統設計(3/3) | 吳安宇 | ||||
233 | 2008 | Traffic-balanced routing algorithm for irregular mesh-based on-chip networks | AN-YEU(ANDY) WU ; Lin, S.-Y.; Huang, C.-H.; Chao, C.-H.; Huang, K.-H.; AN-YEU(ANDY) WU | IEEE Transactions on Computers | |||
234 | 2008 | Unified Convolutional/Turbo Decoder Design Using Tile-Based Timing Analysis of VA/MAP Kernel | Fan-Min Li; Cheng-Hung Lin; AN-YEU(ANDY) WU ; 吳安宇 | Transactions on Very Large Scale Integration (VLSI) Systems | 12 | 11 | |
235 | 2008 | A 7.39mm2 76mw (1944, 972) LDPC decoder chip for IEEE 802.11n applications | AN-YEU(ANDY) WU ; Shih, X.-Y.; Zhan, C.-Z.; AN-YEU(ANDY) WU | 2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008 | |||
236 | 2008 | Low-power traceback MAP decoding for double-binary convolutional turbo decoder | AN-YEU(ANDY) WU ; Lin, C.-H.; Chen, C.-Y.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
237 | 2008 | An efficient methodology to evaluate nanoscale circuit fault-tolerance performance based on Belief Propagation | AN-YEU(ANDY) WU ; Rao, H.; Chen, J.; Zhao, V.H.; Ang, W.T.; Wey, I.-C.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
238 | 2008 | Traffic-Balanced Routing Algorithm for Irregular Mesh-Based On-Chip Networks | Shu-Yen Lin; Chun-Hsiang Huang; Chih-hao Chao; Keng-Hsien Huang; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Computers | 40 | 29 | |
239 | 2008 | Cost-Effective Joint Echo-NEXT Canceller Designs for 10GBase-T Ethernet Systems Based on a Shortened Impulse Response Filter (SIRF) Scheme | Yen-Liang Chen; Ming-Feng Hsu; Jyh-Ting Lai; AN-YEU(ANDY) WU | Journal of Signal Processing Systems | 2 | 2 | |
240 | 2008 | Overview of ITRI PAC project - From VLIW DSP processor to multicore computing platform | AN-YEU(ANDY) WU ; Lin, T.-J.; Liu, C.-N.; Tseng, S.-Y.; Chu, Y.-H.; AN-YEU(ANDY) WU | 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT | |||
241 | 2008 | An 8.29mm2 52mW Multi-mode LDPC Decoder Design for Mobile WiMAX System in 0.13um CMOS Process | Xin-Yu Shih; Cheng-Zhou Zhan; Cheng-Hung Lin; An-Yeu Wu; AN-YEU(ANDY) WU | IEEE Journal of Solid-State Circuits | 110 | 93 | |
242 | 2008 | Design and analysis of isolated noise-tolerant (INT) technique in dynamic CMOS circuits | AN-YEU(ANDY) WU ; Wey, I.-C.; Chen, Y.-G.; AN-YEU(ANDY) WU | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | |||
243 | 2008 | Energy-effective design & implementation of an embedded VLIW DSP | AN-YEU(ANDY) WU ; Hsieh, T.-W.; Hsiao, P.-C.; Liao, C.-Y.; Hsieh, H.-C.; Lin, H.-L.; Lin, T.-J.; Chu, Y.-H.; AN-YEU(ANDY) WU | 2008 International SoC Design Conference, ISOCC 2008 | |||
244 | 2008 | Power efficient low latency survivor memory architecture for viterbi decoder | AN-YEU(ANDY) WU ; Chu, C.-Y.; Huang, Y.-C.; AN-YEU(ANDY) WU | 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT | |||
245 | 2008 | Traffic-Balanced IP Mapping Algorithm for 2D-mesh on-chip-networks | AN-YEU(ANDY) WU ; Lin, T.-J.; Lin, S.-Y.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
246 | 2008 | Design and Analysis of Isolated Noise-Tolerant (INT) Technique in Dynamic CMOS Circuits | I-Chyn Wey; You-Gang Chen; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | 7 | 3 | |
247 | 2008 | A universal look-ahead algorithm for pipelining IIR filters | AN-YEU(ANDY) WU ; Chen, Y.-L.; Chen, C.-Y.; Jheng, K.-Y.; AN-YEU(ANDY) WU | 2008 International Symposium on VLSI Design, Automation, and Test | |||
248 | 2008 | High-throughput dual-mode single/double binary map processor design for wireless wan | AN-YEU(ANDY) WU ; Chen, C.-Y.; Lin, C.-H.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
249 | 2008 | High-performance scheduling algorithm for partially parallel LDPC decoder | AN-YEU(ANDY) WU ; Zhan, C.-Z.; Shih, X.-Y.; AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | |||
250 | 2008 | Cost-effective echo and NEXT canceller designs for 10GBASE-T ethernet system | AN-YEU(ANDY) WU ; Chen, Y.-L.; Zhan, C.-Z.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
251 | 2008 | High-throughput 12-mode CTC decoder for WiMAX standard | AN-YEU(ANDY) WU ; Lin, C.-H.; Chen, C.-Y.; AN-YEU(ANDY) WU | 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT | |||
252 | 2008 | Location-constrained particle filter for rssi-based indoor human positioning and tracking system | AN-YEU(ANDY) WU ; Chao, C.-H.; Chu, N.-Y.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
253 | 2007 | 10GBase-T乙太網路系統晶片設計-子計畫五:適用於10GBase-T乙太網路之高效能數位信號處理引擎設計(3/3) | 吳安宇 | ||||
254 | 2007 | 適用於異質無線網路環境之前瞻MoIP手持裝置SoC設計(1/3) | 吳安宇 | ||||
255 | 2007 | 兆級晶片系統前瞻技術研究-子計畫五:兆級晶片系統中晶片內通訊電路及系統設計(2/3) | 吳安宇 | ||||
256 | 2007 | 適用於異質無線網路環境之前瞻MoIP手持裝置SoC設計(2/3) | 吳安宇 | ||||
257 | 2007 | Joint AGC-Equalization (Joint AGC-EQ) Algorithm and VLSI Architecture For Wirelined Transceiver Designs | Jyh-Ting Lai; An-Yeu Wu; Chien-Hsiung Lee; AN-YEU(ANDY) WU | IEEE Transactions on Very Large Scale Integration (VLSI) Systems (Brief) | 3 | 1 | |
258 | 2007 | On The New Stopping Criteria of Iterative Turbo Decoding by Using Decoding Threshold | Fan-Min Li; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Signal Processing | 40 | 34 | |
259 | 2007 | A clock-fault tolerant architecture and circuit for reliable nanoelectronics system | AN-YEU(ANDY) WU ; Ang, W.T.; Rao, H.F.; Yu, C.; Liu, J.; Wey, I.-C.; Wu, A.-Y.; Zhao, H.; Chen, J.; AN-YEU(ANDY) WU | 2007 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2007 | |||
260 | 2007 | Ensemble dependent matrix methodology for probabilistic-based fault-tolerant nanoscale circuit design | AN-YEU(ANDY) WU ; Rao, H.; Chen, J.; Yu, C.; Ang, W.T.; Wey, I.-C.; Wu, A.-Y.; Zhao, H.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
261 | 2007 | A 0.13μm hardware-efficient probabilistic-based noise-tolerant circuit design and implementation with 24.5dB noise-immunity improvement | AN-YEU(ANDY) WU ; Wey, I.-C.; Chen, Y.-G.; Yu, C.; Chen, J.; Wu, A.-Y.; AN-YEU(ANDY) WU | 2007 IEEE Asian Solid-State Circuits Conference | |||
262 | 2007 | Multilevel LINC system design for wireless transmitters | Chen, Y.-J.; Jheng, K.-Y.; Wu, A.-Y.; Tsao, H.-W.; Tzeng, B.; HEN-WAI TSAO ; AN-YEU(ANDY) WU | 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 | |||
263 | 2007 | Robust packet detector based automatic gain control algorithm for OFDM-based ultra-wideband systems | AN-YEU(ANDY) WU ; Chu, N.-Y.; Lai, J.-T.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
264 | 2007 | A power-aware reconfigurable rendering engine design with 453MPixels/s, 16.4MTriangles/s performance | AN-YEU(ANDY) WU ; Chao, C.-H.; Kuo, Y.-L.; Wu, A.-Y.; Chien, W.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
265 | 2007 | A new binomial mapping and optimization algorithm for reduced-complexity mesh-based on-chip network | AN-YEU(ANDY) WU ; Shen, W.-T.; Chao, C.-H.; Lien, Y.-K.; AN-YEU(ANDY) WU | NOCS 2007: First International Symposium on Networks-on-Chip | |||
266 | 2007 | Dynamic channel flow control of networks-on-chip systems for high buffer efficiency | AN-YEU(ANDY) WU ; Wu, S.-T.; Chao, C.-H.; Wey, I.-C.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
267 | 2007 | A Power-Aware Reconfigurable Rendering Engine Design with 453MPixels/s, 16.4MTriangles/s Performance. | Chao, Chih-Hao; Kuo, Yen-Lin; Wu, An-Yeu; Chien, Weber; AN-YEU(ANDY) WU | International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA | |||
268 | 2007 | Low-Latency Quasi-Synchronous Transmission Technique for Multiple-Clock-Domain IP Modules. | Ye, Jhao-Ji; Chen, You-Gang; Wey, I-Chyn; AN-YEU(ANDY) WU | International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA | |||
269 | 2007 | Reconfigurable Color Doppler DSP Engine for High-Frequency Ultrasonic Imaging Systems. | Yu, Tzu-Hao; Sun, Shih-Yu; Ding, Chih-Liang; Li, Pai-Chi; Wu, An-Yeu; PAI-CHI LI ; AN-YEU(ANDY) WU | Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2007, Proceedings, October 17-19, 2007, Eton Hotel, Shanghai, China | 8 | 0 | |
270 | 2007 | A 19-mode 8.29mm2 52-mW LDPC decoder chip for IEEE 802.16e system | AN-YEU(ANDY) WU ; Shih, X.-Y.; Zhan, C.-Z.; Lin, C.-H.; AN-YEU(ANDY) WU | IEEE Symposium on VLSI Circuits | |||
271 | 2007 | A New Binomial Mapping and Optimization Algorithm for Reduced-Complexity Mesh-Based On-Chip Network. | Shen, Wein-Tsung; Chao, Chih-Hao; Lien, Yu-Kuang; AN-YEU(ANDY) WU | First International Symposium on Networks-on-Chips, NOCS 2007, 7-9 May 2007, Princeton, New Jersey, USA, Proceedings | |||
272 | 2007 | A Systematic Design Approach on the Band-Tracking Packet Detector (BT-PD) for OFDM-Based UWB Systems | Jyh-Ting Lai; An-Yeu Wu; Chien-Hsiung Lee; AN-YEU(ANDY) WU | IEEE Transactions on Vehicular Technology | 8 | 6 | |
273 | 2007 | On the new stopping criteria of iterative turbo decoding by using decoding threshold | AN-YEU(ANDY) WU ; Li, F.-M.; AN-YEU(ANDY) WU | IEEE Transactions on Signal Processing | |||
274 | 2007 | Multilevel LINC system design for power efficiency enhancement | AN-YEU(ANDY) WU ; Jheng, K.-Y.; Chen, Y.-J.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
275 | 2007 | Low-latency quasi-synchronous transmission technique for multiple-clock-domain IP modules | AN-YEU(ANDY) WU ; Ye, J.-J.; Chen, Y.-G.; Wey, I.-C.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
276 | 2007 | On the fixed-point properties of mixed-scaling-rotation cordic algorithm | AN-YEU(ANDY) WU ; Yu, C.-L.; Yu, T.-H.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
277 | 2007 | Ensemble Dependent Matrix Methodology for Probabilistic-Based Fault-tolerant Nanoscale Circuit Design. | Rao, Huifei; Chen, Jie; Yu, Changhong; Ang, Woon Tiong; Wey, I-Chyn; Wu, An-Yeu; Zhao, Hong; AN-YEU(ANDY) WU | International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA | |||
278 | 2006 | A portable all-digital pulsewidth control loop for SOC applications | Wang, Wei; Wey, I-Chyn; Wu, Chia-Tsun; Wu, An-Yeu | IEEE International Symposium on Circuits and Systems | 0 | 0 | |
279 | 2006 | A frequency estimation algorithm for ADPLL designs with two-cycle lock-in time | Wu, Chia-Tsun; Wang, Wei; Wey, I-Chyn; Wu, An-Yeu | IEEE International Symposium on Circuits and Systems | 0 | 0 | |
280 | 2006 | Multi-Symbol-Sliced Dynamically Reconfigurable Reed-Solomon Decoder Design Based on Finite-Field Processing Element | Huai-Yi Hsu; Jih-Chiang Yeo; An-Yeu Wu; AN-YEU(ANDY) WU | IEEE Transactions on VLSI Systems | 11 | 9 | |
281 | 2006 | High-Performance VLSI Architecture of Decision Feedback Equalizer for Gigabit Systems | Chih-Hsiu Lin; An-Yeu Wu; Fan-Min Li; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Trans. Circuits and Systems, Part-II: Express Briefs | 22 | 18 | |
282 | 2006 | A Shortened Impulse Response Filter (SIRF) scheme for cost-effective echo canceller design of 10GBase-T ethernet system | AN-YEU(ANDY) WU ; Hsu, M.-F.; Chen, Y.-L.; Jheng, K.-Y.; AN-YEU(ANDY) WU | 2006 IEEE Workshop on Signal Processing Systems Design and Implementation | |||
283 | 2006 | Rapid IP design of variable-length cached-FFT processor for OFDM-based communication systems | AN-YEU(ANDY) WU ; Lee, Y.-H.; Yu, T.-H.; Huang, K.-K.; AN-YEU(ANDY) WU | 2006 IEEE Workshop on Signal Processing Systems Design and Implementation, SIPS | |||
284 | 2006 | DSP engine design for LINC wireless transmitter systems | AN-YEU(ANDY) WU ; Jheng, K.-Y.; Wang, Y.-C.; Wu, A.-Y.; Tsao, H.-W.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
285 | 2006 | DSP engine design for LINC wireless transmitter systems. | Jheng, Kai-Yuan; Wang, Yi-Chiuan; Wu, An-Yeu; HEN-WAI TSAO ; AN-YEU(ANDY) WU | International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece | 0 | 0 | |
286 | 2006 | A robust band-tracking packet detector (BT-PD) in OFDM-based ultra-wideband systems | AN-YEU(ANDY) WU ; Lai, J.-T.; Chu, N.-Y.; Wu, A.-Y.; Chen, W.-C.; AN-YEU(ANDY) WU | 2006 IEEE Workshop on Signal Processing Systems Design and Implementation | |||
287 | 2006 | A low cost packet detector in OFDM-based ultra-wideband systems | AN-YEU(ANDY) WU ; Lai, J.-T.; Chu, N.-Y.; Wu, A.-Y.; Chen, W.-C.; AN-YEU(ANDY) WU | 2006 IEEE Workshop on Signal Processing Systems Design and Implementation | |||
288 | 2006 | Ultra low-cost 3.2Gb/s optical-rate reed solomon decoder IC design | AN-YEU(ANDY) WU ; Hsu, H.-Y.; Yeo, J.-C.; AN-YEU(ANDY) WU | 2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005 | |||
289 | 2006 | A new early termination scheme of iterative turbo decoding using decoding threshold | AN-YEU(ANDY) WU ; Li, F.-M.; Lin, C.-H.; AN-YEU(ANDY) WU | 2006 IEEE Workshop on Signal Processing Systems Design and Implementation | |||
290 | 2006 | Area-Efficient VLSI Design of Reed-Solomon Decoder for 10GBase-LX4 Optical Communication Systems | Huai-Yi Hsu; An-Yeu Wu; Jih-Chiang Yeo; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Circuits and Systems II: Express Briefs | 44 | 32 | |
291 | 2006 | A new noise-tolerant dynamic circuit design with enhanced PDP performance under low SNR environment | AN-YEU(ANDY) WU ; Chen, Y.-G.; Wey, I.-C.; AN-YEU(ANDY) WU | 2006 IEEE Asian Solid-State Circuits Conference | |||
292 | 2006 | On-line MSR-cordic VLSI architecture with applications to cost-efficient rotation-based adaptive filtering systems | AN-YEU(ANDY) WU ; Yu, T.-H.; Yu, C.-L.; Jheng, K.-Y; AN-YEU(ANDY) WU | 2006 IEEE Workshop on Signal Processing Systems Design and Implementation, SIPS | |||
293 | 2006 | High-performance VLSI architecture of decision feedback equalizer for gigabit systems | AN-YEU(ANDY) WU ; Lin, C.-H.; Wu, A.-Y.; Li, F.-M.; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems II: Express Briefs | |||
294 | 2006 | A triple-mode MAP/VA IP design for advanced wireless communication systems | AN-YEU(ANDY) WU ; Lin, C.-H.; Li, F.-M.; Shi, X.-Y.; AN-YEU(ANDY) WU | 2005 IEEE Asian Solid-State Circuits Conference | |||
295 | 2006 | A 0.18μm probabilistic-based noise-tolerate circuit design and implementation with 28.7dB noise-immunity improvement | Wey, I.-C.; Chen, Y.-G.; Yu, C.; Chen, J.; AN-YEU(ANDY) WU | 2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 | |||
296 | 2005 | A new stopping criterion for efficient early termination in turbo decoder designs | Li, Fan-Min; Wu, An-Yeu | 2005 International Symposium on Intelligent Signal Processing and Communication Systems | 0 | 0 | |
297 | 2005 | Polar transmitter for wireless communication system | Chen, Chung-Chun; Ko, Hung-Yang; Wang, Yi-Chiuan; Tsao, Hen-Wai ; Jheng, Kai-Yuan; Wu, An-Yeu | 2005 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2005 | 0 | 0 | |
298 | 2005 | 子計畫四:可重組化通訊運算引擎的設計與實現(3/3) | 吳安宇 | ||||
299 | 2005 | 適用於用戶線路之低成本低功率頻域等化器技術之實現 | 吳安宇 | ||||
300 | 2005 | Soft-Threshold-Based MultiLayer Decision Feedback Equalizer (STM-DFE) Algorithm and VLSI Architecture | Chih-Hsiu Lin; A.-Y. Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Signal Processing | 5 | 4 | |
301 | 2005 | A scalable DCO design for portable ADPLL designs | AN-YEU(ANDY) WU ; Wu, C.-T.; Wang, W.; Wey, I.-C.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
302 | 2005 | Low cost decision feedback equalizer (DFE) design for giga-bit systems | AN-YEU(ANDY) WU ; Lin, C.-H.; AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | |||
303 | 2005 | A DVB-T baseband demodulator design based on multimode silicon IPs | AN-YEU(ANDY) WU ; Jheng, K.-Y.; Wu, T.-H.; Wang, Y.-C.; Yeo, J.-C.; Cho, Y.-J.; AN-YEU(ANDY) WU | 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test | |||
304 | 2005 | A memory-reduced Log-MAP kernel for turbo decoder | AN-YEU(ANDY) WU ; Tsai, T.-H.; Lin, C.-H.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
305 | 2005 | 百億位元的乙太網路系統晶片設計─子計畫五:適用於高速光通訊之數位基頻電路設計(3/3) | 吳安宇 | ||||
306 | 2005 | A 2gb/s high-speed scalable shift-register based on-chip serial communication design for SoC applications | AN-YEU(ANDY) WU ; Wey, I.-C.; Chang, L.-H.; Chen, Y.-G.; Chang, S.-H.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
307 | 2005 | Soft-threshold-based multilayer decision feedback equalizer (STM-DFE) algorithm and VLSI architecture | AN-YEU(ANDY) WU ; Lin, C.-H.; AN-YEU(ANDY) WU | IEEE Transactions on Signal Processing | |||
308 | 2005 | Digital signal processing engine design for polar transmitter in wireless communication systems | AN-YEU(ANDY) WU ; Ko, H.-Y.; Wang, Y.-C.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
309 | 2005 | A high-speed scalable shift-register based on-chip serial communication design for SoC applications | AN-YEU(ANDY) WU ; Wey, I.-C.; Chen, Y.-G.; Wu, C.-T.; Wang, W.; AN-YEU(ANDY) WU | 2005 PhD Research in Microelectronics and Electronics | |||
310 | 2005 | Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for high-performance vector rotational DSP applications | AN-YEU(ANDY) WU ; Lin, C.-H.; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems I: Regular Papers | |||
311 | 2004 | Unified convolutional/turbo decoder architecture design based on triple-mode MAP/VA kernel | Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu | IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS | 0 | 0 | |
312 | 2004 | Area-efficient VLSI design of Reed-Solomon decoder for 10GBase-LX4 optical communication systems | Hsu, Huai-Yi; Yeo, Jih-Chiang; Wu, An-Yeu | IEEE Asia-Pacific Conference on Advanced System Integrated Circuits | 0 | 0 | |
313 | 2004 | 適用於高速光通訊之數位基頻電路設計(I) | 吳安宇 | ||||
314 | 2004 | 用戶線路之頻域等化器技術設計與研究 | 吳安宇 | ||||
315 | 2004 | Least squares approximation-based ROM-free direct digital frequency synthesizer | Wen, Ching-Hua; Hsu, Huai-Yi; Ko, Hung Yang; Wu, An-Yeu | International Symposium on Circuits and Systems, 2004. ISCAS '04 | |||
316 | 2004 | 1000BASE-T Gigabit Ethernet baseband DSP IC design | Lin, Hsiu-Ping; Chen, Nancy F.; Lai, Jyh-Ting; Wu, An-Yeu | IEEE International Symposium on Circuits and Systems | |||
317 | 2004 | VLSI design of dual-mode Viterbi/turbo decoder for 3GPP | Huang, Kai; Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu | IEEE International Symposium on Circuits and Systems | |||
318 | 2004 | Fast Convergent Pipelined Adaptive DFE Architecture Using Post-Cursor Processing Filter Technique | Meng-Da Yang; An-Yeu Wu; Jyh-Ting Lai; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transaction on Circuits and Systems Part II: Analog and Digital Signal Processing | 3 | 3 | |
319 | 2004 | A design flow for multiplierless linear-phase fir filters: From system specification to verilog code | AN-YEU(ANDY) WU ; Jheng, K.-Y.; Jou, S.-J.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
320 | 2004 | 多媒體通訊系統中可重組化運算技術之研究─子計畫四:可重組化通訊運算引擎的設計與實現(2/3) | 吳安宇 | ||||
321 | 2004 | High-Performance VLSI Architecture of Adaptive Decision Feedback Equalizer Based on Predictive Parallel Branch Slicer (PPBS) Scheme | AN-YEU(ANDY) WU ; Yang, M.-D.; Wu, A.-Y.; Lai, J.-T.; AN-YEU(ANDY) WU | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | |||
322 | 2004 | Academia-industry collaboration in SoC design education: Wishes and reality | AN-YEU(ANDY) WU ; Mashiko, K.; Kanuma, A.; Kozawa, T.; Lee, K.; Wu, A.; Wang, Z.; AN-YEU(ANDY) WU | 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits | |||
323 | 2004 | Robust decision feedback equalizer design using soft-threshold-based multi-layer detection scheme | AN-YEU(ANDY) WU ; Lin, C.-H.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
324 | 2004 | A fast and power-saving self-timed manchester carry-bypass adder for booth multiplier-accumulator design | AN-YEU(ANDY) WU ; Wey, I.-C.; Chow, H.-C.; Chen, Y.-G.; AN-YEU(ANDY) WU | 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits | |||
325 | 2004 | High-Performance VLSI Architecture of Adaptive Decision Feedback Equalizer Based on Predictive Parallel Branch Slicer (PPBS) Scheme | Meng-Da Yang; An-Yeu Wu; Jyh-Ting (Justin) Lai; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | 3 | 3 | |
326 | 2004 | Triple-mode MAP/VA timing analysis for unified convolutional/turbo decoder design | Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | 0 | 0 | |
327 | 2004 | A design flow for multiplierless linear-phase FIR filters: from system specification to Verilog code. | Jheng, Kai-Yuan; Jou, Shyh-Jye; AN-YEU(ANDY) WU | Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004 | |||
328 | 2004 | A scalable Reed-Solomon decoding processor based on unified finite-field processing element design | Yeo, Jih-Chiang; Hsu, Huai-Yi; Wu, An-Yeu | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | 0 | 0 | |
329 | 2004 | Multiplierless multirate decimator / interpolator module generator | AN-YEU(ANDY) WU ; Jou, S.-J.; Jheng, K.-Y.; Chen, H.-Y.; AN-YEU(ANDY) WU | 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits | |||
330 | 2004 | Fast Convergent Pipelined Adaptive DFE Architecture Using Post-Cursor Processing Filter Technique | AN-YEU(ANDY) WU ; Yang, M.-D.; Wu, A.-Y.; Lai, J.-T.; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing | |||
331 | 2003 | 多媒體通訊系統中可重組化運算技術之研究─子計畫四: 可重組化通訊運算引擎之設 計與實現(1/3) | 吳安宇 | ||||
332 | 2003 | Implementation of a programmable 64/spl sim/2048-point FFT/IFFT processor for OFDM-based communication systems | Kuo, Jen-Chih; Wen, Ching-Hua; Wu, An-Yeu | 2003 International Symposium on Circuits and Systems. ISCAS '03 | 0 | 0 | |
333 | 2003 | Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for scaling-free high-performance rotational operations | Lin, Zhi-Xiu; Wu, An-Yeu | IEEE International Conference on Acoustics, Speech, and Signal Processing, 2003 | 0 | 0 | |
334 | 2003 | Angle quantization approach for lattice IIR filter implementation and its trellis de-allocation algorithm | Wu, An-Yeu ; Lee, I-Hsien; Wu, Cheng-Shing | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | 0 | 0 | |
335 | 2003 | A Novel Low-Cost Multi-Mode Reed Solomon Decoder Design Based on Peterson-Gorenstein-Zierler Algorithm | Hsu, Huai-Yi; Wang, Sheng-Feng; Wu, An-Yeu | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 2 | 1 | |
336 | 2003 | 2002 IEEE 信號系統研討會 | 吳安宇 | ||||
337 | 2003 | Editorial | AN-YEU(ANDY) WU ; Wu, A.-Y.A.; Koc, U.-V.; Parhi, K.K.; Theodoridis, S.; AN-YEU(ANDY) WU | Eurasip Journal on Applied Signal Processing | |||
338 | 2003 | A high-performance/low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes | AN-YEU(ANDY) WU ; Wu, Cheng-Shing; Wu, An-Yeu; Lin, Chih-Hsiu; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing | |||
339 | 2003 | A Novel Low-Cost Multi-Mode Reed Solomon Decoder Design Based on Peterson-Gorenstein-Zierler Algorithm | Huai-Yi Hsu; Sheng-Feng Wang; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | Special Issue on Signal Processing Systems: Part II, Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Tech | 2 | 1 | |
340 | 2003 | A novel echo cancellation algorithm and architecture based on multi-part adaptive interpolated FIR filter | AN-YEU(ANDY) WU ; Wu, C.-S.B.; AN-YEU(ANDY) WU | Journal of the Chinese Institute of Electrical Engineering, Transactions of the Chinese Institute of Engineers, Series E/Chung KuoTien Chi Kung Chieng Hsueh K'an | |||
341 | 2003 | A Novel Echo Cancellation Algorithm and Architecture Based on Multi-Path Adaptive Interpolated FIR Filter | Wu, Cheng-Shing; Wu, An-Yeu | Journal of the Chinese Institute of Electrical Engineering | |||
342 | 2003 | VLSI Design of a Variable-Length FFT/IFFT Processor for OFDM-based Communication Systems | Jen-Chih Kuo; Ching-Hua Wen; Chih-Hsiu Lin; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | EURASIP Journal on Advances in Signal Processing | 45 | 33 | |
343 | 2003 | A High-performance/Low-latency Vector Rotational CORDIC Architecture Based on Extended Elementary Angle Set and Trellis-based Searching Schemes | Cheng-Shing Wu; An-Yeu Wu; Chih-Hsiu (Zhi-Xiu) Lin; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Circuits and Systems Part II: Analog and Digital Signal Processing | 64 | 42 | |
344 | 2003 | Dual-mode convolutional/SOVA based turbo code decoder VLSI design for wireless communication systems | AN-YEU(ANDY) WU ; Chen, P.-H.; Kai-Huang; Hsueh, N.-H.; AN-YEU(ANDY) WU | IEEE International SOC Conference, SOCC 2003 | |||
345 | 2003 | Implementation of a programmable 64?2048-point FFT/IFFT processor for OFDM-based communication systems | AN-YEU(ANDY) WU ; Kuo, J.-C.; Wen, C.-H.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
346 | 2003 | A novel multipath matrix algorithm for exact room response identification in stereo echo cancellation | AN-YEU(ANDY) WU ; Lai, J.-T.; Wu, A.-Y.; Yeh, C.-C.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
347 | 2003 | Mixed-Scaling-Rotation CORDIC (MSR-CORDIC) algorithm and architecture for scaling-free high-perforance rotatioal operations | AN-YEU(ANDY) WU ; Lin, Z.-X.; AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | |||
348 | 2003 | VLSI Design of a Variable-Length FFT/IFFT Processor for OFDM-based Communication Systems | Kuo, Jen-Chih; Wen, Ching-Hua; Lin, Chih-Hsiu; Wu, An-Yeu | Eurasip Journal on Applied Signal Processing | 45 | 33 | |
349 | 2002 | A Unified View for Vector Rotational CORDIC Algorithms and Architectures Based on Angle Quantization Approach | Wu, An-Yeu ; Wu, Cheng-Shing | IEEE Transactions on Circuits and Systems Part I | |||
350 | 2002 | High-performance adaptive decision feedback equalizer based on predictive parallel branch slicer scheme | Yang, Meng-Da; Wu, An-Yeu | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | 0 | 0 | |
351 | 2002 | CORDIC(COordinate Rotation Dlgital Computer) | Hu, Y.H.; 吳安宇 | ||||
352 | 2002 | 適用於高數位用戶迴路之DMT 數位IP 模組設計及實現 (II) | 吳安宇 | ||||
353 | 2002 | A new pipelined adaptive DFE architecture with improved convergence rate | Yang, Meng-Da; Wu, An-Yeu | IEEE International Symposium on Circuits and Systems | 0 | 0 | |
354 | 2002 | A novel cost-effective multi-path adaptive interpolated FIR (IFIR)-based echo canceller | AN-YEU(ANDY) WU ; Wu, C.-S.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
355 | 2002 | VLSI design of a reconfigurable multi-mode Reed-Solomon codec for high-speed communication systems | AN-YEU(ANDY) WU ; Hsu, H.-Y.; AN-YEU(ANDY) WU | 2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 | |||
356 | 2002 | A Reduced-complexity Fast Algorithm for Software Implementation of the IFFT/FFT in DMT Systems | Tsun-Shan Chan; Jen-Chih Kuo; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | EURASIP Journal on Applied Signal Processing | 3 | 2 | |
357 | 2002 | A unified view for vector rotational CORDIC algorithms and architectures based on angle quantization approach | AN-YEU(ANDY) WU ; Wu, A.-Y.; Wu, C.-S.; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications | |||
358 | 2002 | A Reduced-complexity Fast Algorithm for Software Implementation of the IFFT/FFT in DMT Systems | Chan, Tsun-Shan; Kuo, Jen-Chih; Wu, An-Yeu | EURASIP Journal on Applied Signal Processing | 3 | 2 | |
359 | 2002 | A novel cost-effective multi-path adaptive interpolated FIR (IFIR)-based echo canceller. | Wu, Cheng-Shing; AN-YEU(ANDY) WU | Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002 | |||
360 | 2002 | A Unified View for Vector Rotational CORDIC Algorithms and Architectures based on Angle Quantization Approach | An-Yeu Wu; Cheng-Shing Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Circuits and Systems Part-I: Fundamental Theory and Applications | 27 | 26 | |
361 | 2002 | Basic Division Scheme | 吳安宇 | ||||
362 | 2001 | A very low-cost multi-mode Reed Solomon decoder based on Peterson-Gorenstein-Zierler algorithm | Wang, Sheng-Feng; Hsu, Huai-Yi; Wu, An-Yeu | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | 0 | 0 | |
363 | 2001 | SOC/IP設計方法與驗證教學研討會執行成果報告 | 吳安宇 | ||||
364 | 2001 | 適用於高速數位用戶迴路之DMT數位IP模組設計及實現 (I) | 吳安宇 | ||||
365 | 2001 | 數位視訊傳輸之前饋式錯誤修正碼之快速雛形機設計技術與 超大型積體電路架構設計(Ⅲ) | 吳安宇 | ||||
366 | 2001 | A cost-effective TEQ algorithm for ADSL systems | Wang, Chih-Chi; Wu, An-Yeu ; Wang, Bor-Min | IEEE International Conference on Communications | 0 | 0 | |
367 | 2001 | A unified design framework for vector rotational CORDIC family based on angle quantization process | AN-YEU(ANDY) WU ; Wu, Cheng-Shing | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | 4 | 0 | |
368 | 2001 | A novel Trellis-based searching scheme for EEAS-based CORDIC algorithm | AN-YEU(ANDY) WU ; Wu, C.-S.; AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | |||
369 | 2001 | Cost-efficient multiplier-less FIR filter structure based on modified decor transformation | AN-YEU(ANDY) WU ; Lee, I.-H.; Wu, C.-S.; AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | |||
370 | 2001 | Cost-efficient multiplier-less FIR filter structure based on modified decor transformation | Lee, I.-H.; Wu, C.-S.; AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings | |||
371 | 2001 | Modified Vector Rotational CORDIC (MVR-CORDIC) Algorithm and Architecture | Wu, Cheng-Shing; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing | 62 | 49 | |
372 | 2001 | An improved time-recursive lattice structure for low-latency IFFT architecture in DMT transmitter | AN-YEU(ANDY) WU ; Yu, C.-L.; AN-YEU(ANDY) WU | Materials Research Society Symposium | |||
373 | 2001 | An improved time-recursive lattice structure for low-latency IFFT architecture in DMT transmitter. | Yu, Chi-Li; AN-YEU(ANDY) WU | Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001 | |||
374 | 2001 | A novel trellis-based searching scheme for EEAS-based CORDIC algorithm. | Wu, Cheng-Shing; AN-YEU(ANDY) WU | IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2001, 7-11 May, 2001, Salt Palace Convention Center, Salt Lake City, Utah, USA, Proceedings | |||
375 | 2000 | Design methodology for Booth-encoded Montgomery module design for RSA cryptosystem | AN-YEU(ANDY) WU ; Leu, Jye-Jong; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
376 | 2000 | Modified vector rotational CORDIC (MVR-CORDIC) algorithm and its application to FFT. | Wu, Cheng-Shing; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings | |||
377 | 2000 | Design methodology for Booth-encoded Montgomery module design for RSA cryptosystem. | Leu, Jye-Jong; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings | |||
378 | 2000 | Modified vector rotational CORDIC (MVR-CORDIC) algorithm and its application to FFT | AN-YEU(ANDY) WU ; Wu, Cheng-Shing; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
379 | 1999 | Scalable low-complexity digit-serial VLSI architecture for RSA cryptosystem | AN-YEU(ANDY) WU ; Leu, Jye-Jong; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
380 | 1999 | A novel multirate adaptive FIR filtering algorithm and structure. | Wu, Cheng-Shing; AN-YEU(ANDY) WU | Proceedings of the 1999 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '99, Phoenix, Arizona, USA, March 15-19, 1999 | |||
381 | 1998 | Transform-domain delayed LMS algorithm and architecture | AN-YEU(ANDY) WU ; Wu, An-Yeu; Wu, Cheng-Shing; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
382 | 1998 | Algorithm-Based Low-Power and High-Performance Multimedia Signal Processing | K. J. R. Liu; AN-YEU(ANDY) WU ; A. Raghupathy; J. Chen | Proceedings of the IEEE | 31 | 26 | |
383 | 1998 | Algorithm-Based Low-Power Transform Coding Architectures: The Multirate Approach | AN-YEU(ANDY) WU ; Liu, K. J. Ray | IEEE Transactions Very Large Scale Integration (VLSI) Systems | 5 | 3 | |
384 | 1998 | Computationally efficient fast algorithm and architecture for the IFFT/FFT in DMT/OFDM systems | AN-YEU(ANDY) WU ; Wu, An-Yeu; Chan, Tsun-Shan; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
385 | 1998 | Cost-efficient parallel lattice VLSI architecture for the IFFT/FFT in DMT transceiver technology. | Wu, An-Yeu; Chan, Tsun-Shan; AN-YEU(ANDY) WU | Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP '98, Seattle, Washington, USA, May 12-15, 1998 | |||
386 | 1998 | System Architecture of an Adaptive Reconfigurable DSP Computing Engine | An-Yeu Wu; K. J. R. Liu; A. Raghupathy; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems for Video Technology | 14 | 10 | |
387 | 1998 | Fast algorithm for reduced-complexity programmable DSP implementation of the IFFT/FFT in DMT systems | AN-YEU(ANDY) WU ; Wu, An-Yeu; Chan, Tsun-Shan; Wang, Bowen; AN-YEU(ANDY) WU | IEEE Global Telecommunications Conference | |||
388 | 1998 | Optimal fixed-point VLSI structure of a floating-point based digital filter design | AN-YEU(ANDY) WU ; Wu, An-Yeu; Hwang, Kuo-Fuo; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
389 | 1998 | Cost-efficient parallel lattice VLSI architecture for the IFFT/FFT in DMT transceiver technology | AN-YEU(ANDY) WU ; Wu, An-Yeu; Chan, Tsun-Shan; AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | |||
390 | 1996 | Split recursive least-squares: Algorithms, architectures, and applications | Wu; A.-Y.; Ray Liu; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing | 9 | 6 | |
391 | 1996 | Low-power design methodology for DSP systems using multirate approach | AN-YEU(ANDY) WU ; Wu, An-Yeu; Ray Liu, K.J.; Zhang, Zhongying; Nakajima, Kazuo; Raghupathy, Arun; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
392 | 1996 | Parallel programmable video co-processor design | AN-YEU(ANDY) WU ; Wu, An-Yeu; Ray Liu, K.J.; Raghupathy, Arun; Liu, Shang-Chieh; AN-YEU(ANDY) WU | IEEE International Conference on Image Processing | |||
393 | 1995 | FFT VLSI Implementation VLSI Signal Processing | 吳安宇 | ||||
394 | 1995 | Algorithm-based low-power transform coding architectures. | Wu, An-Yeu; Liu, K. J. Ray; AN-YEU(ANDY) WU | 1995 International Conference on Acoustics, Speech, and Signal Processing, ICASSP '95, Detroit, Michigan, USA, May 08-12, 1995 | |||
395 | 1995 | Algorithm-based low-power DSP system design: Methodology and verification | AN-YEU(ANDY) WU ; Wu, An-Yeu; Liu, K.J.Ray; Zhang, Zhongying; Nakajima, Kazuo; Raghupathy, Arun; Liu, Shang-Chieh; AN-YEU(ANDY) WU | IEEE Workshop on VLSI Signal Processing | |||
396 | 1995 | Parallel programmable video co-processor design. | Wu, An-Yeu; Liu, K. J. Ray; Raghupathy, Arun; Liu, Shang-Chieh; AN-YEU(ANDY) WU | Proceedings 1995 International Conference on Image Processing, Washington, DC, USA, October 23-26, 1995 | |||
397 | 1995 | Algorithm-based low-power transform coding architectures | AN-YEU(ANDY) WU ; Wu, An-Yeu; Liu, K.J.Ray; AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | |||
398 | 1994 | Low-power and low-complexity DCT/IDCT VLSI architecture based on backward chebyshev recursion | AN-YEU(ANDY) WU ; Wu, An-Yeu; Liu, K.J.Ray; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
399 | 1994 | Algorithms and architectures for split recursive least squares | AN-YEU(ANDY) WU ; Liu, K.J.Ray; AN-YEU(ANDY) WU | IEEE Workshop on VLSI Signal Processing | |||
400 | 1994 | A Low-Power and Low-Complexity DCT/IDCT VLSI Architecture Based On Backward Chebyshev Recursion. | Wu, An-Yeu; Liu, K. J. Ray; AN-YEU(ANDY) WU | 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30 - June 2, 1994 | |||
401 | 1993 | Multi-layer 2-D adaptive filtering architecture based on McClellan transformation | AN-YEU(ANDY) WU ; Liu, K.J.Ray; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | |||
402 | 1989 | Applications of Distributed Arithmetic to Digital Signal Processing: A Tutorial Review | 吳安宇 | ||||
403 | 0 | a | a; AN-YEU(ANDY) WU ; 吳安宇 |